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Chapter 1: Overview
General Description
Cyclone III 3C120 Development Board Reference Manual
© March 2009 Altera Corporation
The Cyclone III development board has the following main features:
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High logic density to implement more functions and features
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Embedded memory for high-bandwidth applications
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Expandable through two Altera High-Speed Mezzanine Connectors (HSMCs)
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256-MB of dual channel DDR2 SDRAM with a 72-bit data width
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Supports high-speed external memory interfaces including dual-channel DDR
SDRAM and low-power SRAM
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Four user push-button switches
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Eight user LEDs
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Power consumption display
The Cyclone III development board provides the following advantages:
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Unique combination of low-cost, low-power Cyclone III FPGA that supports
high-volume, memory-intensive designs
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Highest multiplier-to-logic ratio FPGA in the industry
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Lowest cost, density- and power-optimized FPGA
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Quartus II development software’s power optimization tools
Board Component Blocks
The board features the following major component blocks:
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780-pin Altera Cyclone III EP3C120 FPGA in a BGA package
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119K logic elements (LEs)
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3,888 Kbits of memory
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288 18 × 18 multiplier blocks
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Four phase locked loops (PLLs)
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20 global clock networks
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531 user I/Os
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1.2-V core power
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256-pin Altera MAX
®
II EPM2210G CPLD in a FineLine Ball Grid Array (FBGA)
package
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1.8-V core power
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On-board memory
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256-MB dual-channel DDR2 SDRAM
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8-MB SRAM
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64-MB flash memory
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