Alstom GEM80-400 Series, Техническое руководство

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GEM80-400 2. Controller Architecture and Program Operation
Issue 3 04/99 ALSPA GEM80-400 SERIES CONTROLLERS TECHNICAL MANUAL Page 2-1
2.
Controller Architecture and Program Operation
2.1.
Controller Architecture
The GEM 80-400 Controllers are single processor system containing all the
necessary logic components of a PLC (Programmable Logic Controller), i.e.
ladder diagram interface to the user, memory for ladder programs, data tables,
workspace and an interface for communication with the Plant.
In order to provide a larger capacity, a memory expansion sub-board is mounted
directly onto the circuit board. A Central Highway, in the form of a PCB (printed
circuit board) backplane, provides high-speed interconnection between the
Processor, Basic and Verification I/O Modules and, in the case of the Enhanced
version, Central Highway Modules and/or RAM cards in the subrack. The
Processor controls the data movement between the I/O Highway, Serial
Communication Ports or the Printer/Programmer Port to the memory modules,
and executes the compiled user program.
The Fast I/O Driver, which may be fitted in the Enhanced Controller only, provides
a buffer for data exchanges between the Central Highway and any Fast I/O
Modules. The IMAGEM Processors, which can be fitted in the GEM 80-400
Enhanced Controller, output a picture from data stored in the video memory and
Host Controller memory.
Figure 2.1 shows a typical architecture of a GEM 80-400 Controller. In the
following description the GEM 80-400 Processor Module resides in an Alspa 80-75
host subrack, however this could equally be any other based subrack
conforming to
bus Specification REV C.1 October 1985 .
The RAM is battery backed with a typical support life, after one year powered up,
of 9 weeks minimum at 70
°
C or 47 weeks minimum at 40
°
C. Battery low indication,
on the GEM 80-400 Processor Module, is given by a message, 'BATT', on the
alphanumeric display of the processor front panel. On GEM80-400 Processor
Modules fitted with an EPROM sub-module, the compiled program and the P-
table can be transferred to EPROM memory for increased security. See later in
this chapter for further details.