Programming and Parameters
5-5
PowerFlex 700L Frames 2, 3A, and 3B Liquid-Cooled AC Drives User Manual
Affected 700S Phase II
Control Parameters
When a PowerFlex 700L Liquid-Cooled drive is present, the following
700S Phase II Control functions are affected:
•
Supports DPI communication ports 1 through 6.
•
Supports DPI Type III communication with an active converter.
•
Supports the power structure fault latch and multiple NTCs.
•
Supports IT (Junction Temperature Calculation) mode.
•
Bus regulator mode is disabled when an active converter is present.
•
Fast Flux-up current is limited to 40% of motor nameplate current
instead of 70% (PowerFlex 700S).
Utility File
In the Utility file - Diagnostics group, the following parameters are
available when a PowerFlex 700L Liquid-Cooled AC drive is present.
No.
Name
Description
Values
332
700L EventStatus
Indicates the presence of certain drive anomalies for the PowerFlex 700L Liquid-Cooled drive.
Bit 0 [Dsat Phs U1] indicates that the primary structure detected a Dsat on phase U.
Bit 1 [Dsat Phs V1] indicates that the primary structure detected a Dsat on phase V.
Bit 2 [Dsat Phs W] indicates that the primary structure detected a Dsat on phase W.
Bit 3 [Ovr Current1] indicates that the primary structure detected an over current.
Bit 4 [Ovr Volt1] indicates that the primary structure detected an over voltage.
Bit 5 [Asym DcLink1] indicates that the primary structure detected an unbalanced DC Link.
Bit 6 [Pwr Suply1]indicates that the primary structure detected a power supply failure.
Bit 7 [HW Disable1] indicates that the primary structure detected a hardware disable.
Bit 8 [Latch Err1] indicates that the primary structure fault was generated but no indicating bit was set.
Bit 9 [Fan Fail1] indicates
Bit 12 [NonCnfgAlarm] indicates
Bit 13 [Cnv Faulted] indicates
Bit 14 [Cnv NotLogin] indicates the converter was expected but none logged in.
Bit 15 [Cnv NotStart] indicates the converter was commanded to start but did not become active.
Bit 16 [Dsat Phs U2] indicates the second structure detected a Dsat on phase U.
Bit 17 [Dsat Phs V2] indicates the second structure detected a Dsat on phase V.
Bit 18 [Dsat Phs W2] indicates the second structure detected a Dsat on phase W.
Bit 19 [Ovr Current2] indicates the second structure detected an over current.
Bit 20 [Ovr Volt2] indicates the second structure detected an over voltage.
Bit 21 [Asym DcLink2] indicates the second structure detected an unbalanced DC Link.
Bit 22 [Pwr Suply2] indicates the second structure detected a power supply failure.
Bit 23 [HW Disable2] indicates the second structure detected a hardware disable.
Bit 24 [Latch Err2] indicates the second structure fault was generated but no indicating bit was set.
Bit 25 [Fan Fail2] indicates
Note: This parameter was added for firmware version 2.03.
Bit
Definition
Reser
ved
Reser
ved
Reser
ved
Reser
ved
Reser
ved
Reser
ved
Fa
n F
ai
l2
Lat
ch Er
r2
HW
Disa
bl
e2
Pwr Sup
ly
2
A
sy
m
D
cLi
nk
2
Ovr V
olt2
Ovr Cur
rent
2
Dsat P
hs
W2
Dsat P
hs
V2
Dsat P
hs
U2
Cn
v NotStar
t
Cn
v Not
Login
Cn
v F
aulted
NonCnf
gAlar
m
Reser
ved
Reser
ved
Fa
n F
ai
l1
Lat
ch Er
r1
HW
Disa
bl
e1
Pwr Sup
ly
1
A
sy
m
D
cLi
nk
1
Ovr V
olt1
Ovr Cur
rent
1
Dsat P
hs
W1
Dsat P
hs
V1
Dsat P
hs
U1
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
0 = False
1 = True
Aotewell Ltd
www.aotewell.com
Industry Automation
HongKong|UK|China
+86-755-8660-6182