Alesis MIDIVERB IV, Руководство по обслуживанию

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Alesis MidiVerb IV Service Manual‘ 2 03/05/99
3.20 Output
The differential outputs of the DAC (U12) are converted to a single ended mode via U7B
and U7A and their surrounding circuitry. This circuitry also provides some low pass filtering.
These signals are then A.C. coupled by C1 and C3 before being sent to the output DigPots.
The output of the DigPots is buffered by U7D and U7C before being sent to the output jacks (J1
and J2). The output impedance of the unit is fixed at approximately 220
Ω
by resistors R15 and
R19. C24 and C26 provide R.F. filtering for the outputs.
4.00 A-D/D-A
4.10 A-D
The A to D is a 128 times over sampling Philips 7360 high performance device. It is a
stereo part utilizing high Sigma-Delta conversion techniques that eliminates the need for sample
and holds, and extensive anti aliasing filters.
The right channel is input through R37, while R47 is a feedback for to the A to D’s
internal input buffer amplifier. R42 and R60 provide negative and positive inputs to the A to D’s
internal sigma delta modulator. C40 is a small filter cap placed between these inputs.
The left input is identical and uses R38, R49, R43, R38 and C41.
C8, C42, C9, and C43 are the bypass filters for the internal voltage reference. C35 along
with R34 and R35 act as filters for the negative and positive internal DAC reference inputs.
Analog power is supplied through current limiters (R52, and R56) which help suppress current
spikes. C44, C45, and C13 act as bypass filters for the analog supply. The digital supply is
filtered by C16, C50, and R60.
R48 is a current reference and has a tolerance of 1% for precision.
The A to D’s stereo output is transmitted from the
FROMADC line to the M4 ASIC chip
(U9).
4.20 D-A
The digital to analog converter is U12 which is an AKM 4318A DAC. Like the A to D, this
D to A is a high performance over sampling stereo device. It can achieve an outstanding signal
to noise ratio of 98 dB which is unprecedented in it’s price range. Also, the over sampling nature
significantly reduces output filter requirements.
The analog power filter consists of C16, and C48, while the digital is supplied via diodes
D10 and D11, and is filtered by C14, and C47. It’s bit clock, which is 3.0MHz, is derived from the
12MHz clock by the M4 ASIC U9.
The D to A outputs are routed through differential amplifiers to the unit’s output jacks, via
the analog output section (see sec. 3.20).
Note that this product is specifically designed to take advantage of the "A" version of the AKM
device. This means that the unit is not compatible with the older AKM-4318 (no "A" suffix) part.