Alesis MIDIVERB IV, Руководство по обслуживанию

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Alesis MidiVerb IV Service Manual‘ 4 03/05/99
PIn #(s) Function
9
MICROALE > MICROprocessor Address Latch Enable - Used to
enable the low order address buss latch. (See also MICROAD0-7,
LSADDR0-7.)
10-17 LSADDR0-7> microprocessor Low order Stored ADDRess 0-7 -
These lines represent the low order address buss values during the
time that the data/address bus is transferring data values. (See also
MICROAD0-7, MICROALE.)
43 DSPSRAMOE>
DSP SRAM Output Enable - Enables the output of the
SRAM directly under the control of the M4 ASIC.
44 SRAMWR>
SRAM WRite enable - Enables writing to the SRAM
directly under the control of the M4 ASIC
19 M12CLK>
12 Mhz CLocK -
20 M3CLK> 3 Mhz CLocK -
21
LRCLK> Left-Right CLocK - Used to determine which channel of the
stereo DAC data is sent to.
22
DACDATA> Digital-Analog Converter DATA -
23 FROMADC>
FROM Analog-Digital Converter -
24-25, 28-42 SRAMA0-16> SRAM Address 0-16 - Address buss of the SRAM
directly under the control of the M4 ASIC.
45-52 SRAMD0-7> SRAM Data 0-7 - Data buss of the SRAM directly under
the control of the M4 ASIC.
59 XTALIN> XTAL IN - 12MHz crystal oscillator.
60 XTALOUT>
XTAL OUT - 12MHz crystal oscillator.
54 LCDEN> LCD ENable - Enables the LCD’s internal data latch.