Mainboard KM51PV-754
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PIC Mode
APIC stands for Advanced Programmable Interrupt Controller, and is used to extend the
number of available IRQs available in order to avoid sharing conflicts.
Options: Disabled, Enabled (Default).
PS Version Control For OS
The 1.1 version is the older version that supports 8 more IRQs in the Windows NT environment.
Choose the new 1.4 version for Windows 2000 and Windows XP.
Options: 1.4 (Default), 1.1.
S Select For DRAM > 64MB
Select “OS2” only if you are running the OS/2 operating system with greater than 64 MB of RAM.
Options: Non-OS2 (Default), OS2.
DD S.M.A.R.T. Capability
The SMART (Self Monitoring Analysis and Reporting Technology) technology enables a PC to
attempt to predict the possible failure of storage drives.
Options: Disabled (Default), Enabled.
mall LOGO (EPA) Show
This option allows you to show or hide the small LOGO EPA.
Options: Disabled (Default), Enabled.
Advanced Chipset Features
RAM Configuration
ing Mode
This option determines DRAM clock/ timing using SPD or manual configuration.
Make sure your memory module has SPD (Serial Presence Data) if you want to use the “By
SPD” option.
Options: Auto (Default), Manual.
mclock index value (Mhz)
This item allows you to select the memory clock. When it set to “auto”, the system will
automatically detect the memory clock. Options: 200, 100, 133, 166.
S# latency (Tcl)
This option determines CAS Latency. When synchronous DRAM is installed, the number of
clock cycles of CAS latency depends on the DRAM timing. Do not reset this option from the
default system manufacturer value. This option is adjustable only when “DRAM Timing
Selectable” is set to “Manual”. This option is locked when “DRAM Timing Selectable” is set to
“By SPD” and is automatically determined by the system.
Options: 2.0, 2.5, 3.
RAS# active time (Tras)
This option allows you to select DRAM Active to Precharge Delay.
Options: Auto, 5T, 6T, 7T, 8T, 9T, 10T, 11T, 12T, 13T, 14T, 15T.
