KM333 Series
29
CPU & PCI Bus Control
PCI1/2 Master 0 WS Write
When enabled, writes to the PCI bus are executed with zero-wait states.
Options: Enabled (default)
、
Disabled
PCI Delay Transaction
The chipset has an embedded 32-bit post write buffer to support delay transactions
cycles. Select Enabled to comply with PCI specifications.
Options: Disabled
、
Enabled (default)
Memory Hole
When enabled, you can reserve an area of system memory for ISA adapter ROM. When
this area is reserved, it cannot be cached. Refer to the user documentation of the
peripheral you are installing for more information. Options: Disabled (default)
、
15M-16M
System BIOS Cacheable
When enabled, accesses to system BIOS ROM addressed at F0000H-FFFFFH are cached,
provided that the cache controller is enabled. Options: Enabled
、
Disabled (default)
Video RAM Cacheable
Select “Enabled” to allow caching of the video RAM which may improve performance. If
any other program writes to this memory area, a system error may result. Options:
Enabled
、
Disabled (default)
PnP/PCI Configurations
PNP OS Installed
When set to “YES”, BIOS will only initialize the PnP cards used for the boot sequence (VGA,
IDE, SCSI). The rest of the cards will be initialized by the PnP operating system like
Windows
®
95. When set to “NO”, BIOS will initialize all the PnP cards. For non-PnP operating
systems (DOS, Netware), this option must be set to “NO”.
Options: No (default)
、
Yes
Reset Configuration Data
Select “Enabled” to reset the Extended System Configuration Data (ESCD) if you have
installed a new add-on card and the system reconfiguration has caused such a serious
conflict that the OS cannot boot. Options: Disabled (default)
、
Enabled
Resources Controlled By
BIOS can automatically configure all the boot and Plug and Play compatible devices. If
you choose Auto, you will not be able to manually assign IRQ DMA and memory base
address fields, since BIOS automatically assigns them. Options: Auto <ESCD> (default)
、
Manual
Содержание KM333 PRO
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