[AKD4637-B]
<KM120603>
2018/10
- 7 -
(4) Evaluation in Loop-back Mode
(4-1) Setting in PLL Master Mode
Do not connect anything to PORT1 (DIR), PORT2 (DIT).
Registers of the AK4637 should be set to “PLL Master Mode”. MCLK should be supplied to JP5.
The jumper pins should be set as follows.
JP8
JP9
SDTO
SDTI
DIR
ADC
JP10
SDTI-SEL
(4-2) Setting in PLL Slave Mode
Do not connect anything to PORT1 (DIR) and PORT2 (DIT).
Registers of the AK4637 should be set to “PLL Slave Mode” (Reference Clock: BICK).
BICK and FCK should be supplied to JP6 and JP7.
The jumper pins should be set as follows.
JP5
MCKI
JP8
DIR
EXT
JP9
SDTO
SDTI
DIR
ADC
JP10
SDTI-SEL
(4-3) Setting in External Slave Mode
Do not connect anything to PORT1 (DIR), PORT2 (DIT).
Registers of the AK4637 should be set to “EXT Slave Mode”.
Use clocks from AK4118A. In case, use X1 (12.288MHz).
The jumper pins should be set as follows.
JP5
MCKI
JP6
BICK
JP7
FCK
DIR
EXT
DIR
EXT
JP8
DIR
EXT
JP9
SDTO
SDTI
DIR
ADC
JP10
SDTI-SEL