
ASAHI KASEI
[AKD4552-A]
<KM080600>
2005/10
-
4
-
(2) Evaluation of D/A using DIR (Optical Link)
PORT1 (DIR) is used. DIR generates MCLK, BCLK, LRCK and SDATA from the received data through
optical connector (TORX176). Used for the evaluation using CD test disk. Nothing should be connected to
PORT3 (ROM). Set up “H” (AK4112B : PLL mode) for SW2-5 (CM0).
JP3
LRCK
DIR
ADC
JP4
BCLK
JP8
XTE
JP13
DIR
ADC
JP6
SDTI
DIR
ADC
EXT
•
Clock example
2-1) Normal speed of DAC (MCLK=256fs)
Input
fs
example
for
PORT1
:
fs
=
32kHz,
44.1kHz,
48kHz
JP2
MCKO
M2
M1
JP7
SPEED
JP9
MCLK
X2
X1
X4
X1
X4
X2
X1
X4
X1
JP10
BCFS
JP12
LRFS
JP11
CLK
DIR
EXT
XTL
SW2
MODE
1
2
3
4
5
DE
M0
DE
M1
OCK
S
0
OCK
S
1
CM
0
H
L
L
L
L
2-2) Normal speed of DAC (MCLK=512fs)
Input
fs
example
for
PORT1
:
fs
=
32kHz,
44.1kHz,
48kHz
JP2
MCKO
M2
M1
JP7
SPEED
JP9
MCLK
X2
X1
X4
X1
X4
X2
X1
X4
X1
JP10
BCFS
JP12
LRFS
JP11
CLK
DIR
EXT
XTL
SW2
MODE
1
2
3
4
5
DE
M0
DE
M1
OCK
S
0
OCK
S
1
CM
0
H
L
L
H
L
2-3) Double speed of DAC (MCLK=256fs)
Input
fs
example
for
PORT1
:
fs
=
64kHz,
88.2kHz,
96kHz
JP2
MCKO
M2
M1
JP7
SPEED
JP9
MCLK
X2
X1
X4
X1
X4
X2
X1
X4
X1
JP10
BCFS
JP12
LRFS
JP11
CLK
DIR
EXT
XTL
SW2
MODE
1
2
3
4
5
DE
M0
DE
M1
OCK
S
0
OCK
S
1
CM
0
H
L
L
L
L