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[AKD4128A-A]
[KM104301]
2010/09
- 19 -
(2)-2.
SW16(U6) setting.
Upper-side is “H” and lower-side is “L”.
SW16
No.
Name
ON (“H”)
OFF (“L”)
Default
1 DIT-OCKS1
H
2 DIT-OCKS0
Master Clock Frequency Setting
Refer to Table 19
L
3 DIT-DIF2
H
4 DIT-DIF1
L
5 DIT-DIF0
Audio Interface Format Setting
Refer to Table 20
L
Table 18. Master Clock Frequency Setting
Mode OCKS1 pin
OCKS0 pin
MCKO1 fs
(max)
0 L
L
256fs 96
kHz
1 L
H 256fs 96
kHz
2 H
L
512fs 48
kHz
(Default)
3 H
H
128fs 192
kHz
Table 19. Master Clock Frequency Setting
LRCK BICK
Mode
DIF2
pin
DIF1
pin
DIF0
pin
DAUX Format
I/O
I/O
0
L
L
L
24bit, Left justified
H/L
O
64fs
O
1
L
L
H
24bit, Left justified
H/L
O
64fs
O
2
L
H
L
24bit, Left justified
H/L
O
64fs
O
3
L
H
H
24bit, Left justified
H/L
O
64fs
O
4
H
L
L
24bit, Left justified
H/L
O
64fs
O
(Default)
5 H L H
24bit,
I
2
S
Compatible L/H
O 64fs O
6
H
H
L
24bit, Left justified
H/L
I
64-128fs
I
7 H H H
24bit,
I
2
S Compatible L/H
I
64-128fs
I
Table 20. Audio Interface format Setting
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