AJA R20CE, Руководство пользователя

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AJA R20CE 10-bit Encoder User Manual — Installation
Reference Select and Termination Configuration
Output Timing
Adjustment (With
Model FSG
Framesync/
Genlock Option
The following procedure provides instructions for output timing adjustment of the R20CE
when used with the model FSG FRAMESYNC/GENLOCK option.
The R20CE has three levels of output timing adjustment:
• advance or delay by lines
• advance or delay by pixels (with l/4 pixel resolution)
• fine timing adjust (+/- 40 nanoseconds)
There are two modes of timing adjustment:
• Genlock
• Delay
If the R20CE detects an external reference, it then enters Genlock mode. If no external
reference is detected, the board enters Delay mode. In Genlock mode, the R20CE output
genlocks to the external reference. The board can be set to Delay mode without removing the
external reference by lifting the "REFERENCE SELECT" jumper (J3).
Genlock Mode
1. Perform function 1 in Bank 1 " SET DEFAULT DELAY. " This brings the output
timing close to the reference's timing.
2. Perform function 3 in Bank 1 " SET PIXEL DELAY. " This will allow adjustment to
within l/4 pixel of reference.
3. Adjust the " FINE TIMING ADJUST " control on the front of the R20CE board for
precise exact timing (refer to photo provided).
Reference Strapping
Front of Card
Field (J3)
ON OFF
FRAME
LOOP
J3
Reference Select:
FRAME = Selects Aux BNC on Frame
LOOP = Selects Reference Loop BNC
on Card Module Connectors
Termination:
OFF = No Termination
ON = 75 Ohm Internal Termination
Jumpers shown with Reference Select set to “LOOP”
and Termination set to “OFF”