57
Appendix C
C.3 A/D Single Value Acquisition
Write BASE+0, 2, 4, 6
In single value acquisition mode (SW trigger), the A/D converter will
convert one sample when you write to the register
Write BASE+0, 2, 4, 6
with any value. User can check the A/D FIFO status
(FIFOn_FE
) to
make sure if the data is ready to be received.
Table C.4: PCI-1714 register format (Part 4)
Base
Address
+ HEX
PCI-1714 Register Format
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
30h W Reset start read channel to CH0
R AD Channel n DATA
TR
GF
OV G1 G0 AD1
1
AD1
0
AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
32h W N/A
R AD Channel n+1 DATA
TR
GF
OV G1 G0 AD1
1
AD1
0
AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
34h W DMA Request selector
DS0
R
Table C.5: Register for Single Value Acquisition
Base
Address
+ HEX
PCI-1714 Register Format
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
0h
W AI Channel 0 Single Value Acquisition
R AI Channel 0 Data
TR
GF
OV G1 G0 AD
11
AD
10
AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
Содержание PCI-1714
Страница 8: ...PCI 1714 1714L User Manual viii...
Страница 13: ...5 Chapter1 Figure 1 1 Installation Flow Chart...
Страница 18: ...PCI 1714 1714UL User Manual 10...
Страница 34: ...PCI 1714 1714UL User Manual 26...
Страница 52: ...PCI 1714 1714UL User Manual 44...
Страница 53: ...2 APPENDIX A Specifications...
Страница 56: ...PCI 1714 1714UL User Manual 48...
Страница 57: ...2 APPENDIX B Block Diagram...
Страница 58: ...PCI 1714 1714UL User Manual 50 Appendix B Block Diagram...
Страница 59: ...2 APPENDIX C Register Structure Format...