Advantech PCI-1714, Руководство пользователя

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65 Appendix C
C.11 DMA Counter - Write/Read BASE+1C, Write
BASE+1E
CN15: CN0 DMA counter register:
DMA counter is a16-bit counter designed for ABOUT and DELAY trig-
ger mode only. Set the counter value for about trigger data counts after
the trigger event. Also the value for delay trigger data counts after the
trigger event.
Rest DMA Counter
Before start the DMA counter, write the
BASE + 1Eh to reset the DMA
counter.
Table C.13: Register for DMA Counter
Base
Address
+ HEX
PCI-1714 Register Format
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1Ch W DMA Counter Register
CN
15
CN
14
CN
13
CN
12
CN
11
CN
10
CN9 CN8 CN7 CN6 CN5 CN4 CN3 CN2 CN1 CN0
R
CN
15
CN
14
CN
13
CN
12
CN
11
CN
10
CN9 CN8 CN7 CN6 CN5 CN4 CN3 CN2 CN1 CN0
1Eh W Rest DMA Counter