Chapter 4 FPM Receiver Setup (PanelLink) (for PCA-6654 only)
47
4.8.8 LCD clock configuration select (S2)
Table 4-10: LCD clock configuration select (S2)
Pin Pin Pin Pin
LCD type
Frequency/data latch edge/mode
1
2#
3
4
* TFT/16-bit DSTN divided by 1/negative/free running ON
X
ON
ON
TFT/16-bit DSTN
divided by 1/positive/free running
ON
X
OFF ON
TFT
divided by 2/negative/free running OFF X
ON
ON
TFT
divided by 2/positive/free running
OFF X
OFF ON
24-bit DSTN
divided by 1/negative/blanked low
ON
X
ON
OFF
NONE
divided by 1/negative/blanked high ON
X
OFF OFF
24-bit DSTN
divided by 2/negative/blanked low
OFF X
ON
OFF
24-bit DSTN
divided by 4/negative/blanked low
OFF X
OFF OFF
* default setting
# Termination resistor range selection:
ON:
55 ~ 70
Ω
OFF: 40 ~ 57
Ω
(default)
Содержание PCA-6654
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