4
61291004L2-5, Issue 2
61291004L2-5B
Options
Select the appropriate OPTIONS and RATE using
SW1 front panel switch as illustrated in
Figure 6
.
Figure 6. Rate Selection and Option Switch
ON
SC
64
56
19.2
9.6
4.8
2.4
QM
LLB
89
7
6
5
4
3
2
1
SW1
Table 2. LED Indicators
Span Power
Span-powering is accomplished using -130 Vdc,
measured from Tip to Ring. Voltage measured from
Ring to GND should indicate 0 V. Voltage measured
from Tip to GND should indicate about -130 Vdc or
less depending on voltmeter impedance.
Synchronization and LED Indication
The TRDDB and TROCU-R typically require 30 to 90
seconds to achieve synchronization. Once
synchronized, the SYNC indicator LED will turn
Green. If synchronization cannot be achieved, check
the T/R pair for open- or short-circuit conditions or
load coils. Refer to
Table 2
for LED indication.
False Loopback Immunity
ADTRAN’s Protected Loopback family of channel
units include an algorithm compatible with SARTS,
Hekimian, TPI, and other test systems that virtually
eliminates false latching loopback occurrences. This
algorithm is always enabled at 64 kbps. In addition,
ADTRAN’s Protected Loopback family features a
Protected Loopback mode for further false latching
loopback protection.
Latching Loopback (SW1-1)
During operation up to 56 kbps with LLB enabled
(SW1-1 ON), the TRDDB will respond to the legacy
DS0 latching loopback sequences and translates OCU
and CSU latching loopback sequences to the OCU-R
per TR62310 and ANSI T1.417. With LLB OFF, the
TRDDB will not respond to latching loopback.
At 64 kbps the function of the LLB switch is altered.
When 64 kbps is enabled, placing LLB to ON will
permit the TRDDB to respond to the legacy latching
loopback sequence per TR62310 and ANSI T1.417.
At 64 kbps, with LLB OFF, the TRDDB will enable
ADTRAN’s Protected Loopback mode.
Protected Loopback
ADTRAN’s Protected Loopback supports the DDS
latching loopback standard in T1E1.2/99-007R1.
When enabled, the TRDDB will respond to latching
loopback when the idle code preamble is sent prior to
the latching loopback sequence specified in TR62310
and ANSI T1.417. See
Table 3
for the latching
loopback sequence requirement when Protected
Loopback is enabled.
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Содержание Total Reach TRDDB
Страница 10: ...10 61291004L2 5 Issue 2 61291004L2 5B ...
