ADLINK Technology PCI-8213, Руководство пользователя

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Bypass and WDT
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27
Reset value: 0 (all pins are input only)
7:4
GPIO output
enable
Write-1-to-set
R/W1TS
The gpio<3:0> pin output enable control
write-1-to-set. Writing 1 to any of these
bits configures the corresponding
gpio<3:0> pin as bi-directional, that is,
enables the output driver and drives the
value set in the output data register
(65h). Writing 0 to these bits has no
effect. When read, reflects the last value
written.
Reset value: 0 (all pins are input only)
Generate WDT Commands
Enable WDT:
(i) Write 01h to reg#65h and 10h to reg#66h (let GPIO0 to be low)
(ii) Write 10h to reg#65h (Let GPIO0 to be high)
Disable WDT:
(i) Write 02h to reg#65h and 20h to reg#66h (let GPIO1 to be low)
(ii) Write 20h to reg#65h (Let GPIO1 to be high)
Reload WDT:
(i) Write 04h to reg#65h and 40h to reg#66h (let GPIO2 to be low)
(ii) Write 40h to reg#65h (Let GPIO2 to be high)
Switch to Normal State:
(i) Write 08h to reg#65h and 80h to reg#66h (let GPIO3 to be low)
Note. The GPIO3 pin is effective only if JP4~7 setting Default
State to Bypass State .