ADLINK Technology Inc.
LEC-
iMX6R2 User’s Guide
Page 54
copyright © 2021 ADLINK Technology Inc.
P126
RESET_OUT#
Out
-
CMOS/1.8V
BMC
PC4
-
-
P127
RESET_IN#
In
PU-10K
CMOS/1.8V
BMC
PC12
-
-
P128
POWER_BTN#
In
-
CMOS/1.8V
BMC
PA11
-
-
P129
SER0_TX
Out
-
CMOS/1.8V
i.MX6 QP/Q/DP/D/DL/S
SD3_DAT7
Alt1
NVCC_SD3
P130
SER0_RX
In
-
CMOS/1.8V
i.MX6 QP/Q/DP/D/DL/S
SD3_DAT6
Alt1
NVCC_SD3
P131
SER0_RTS#
In
-
CMOS/1.8V
i.MX6 QP/Q/DP/D/DL/S
EIM_D20
Alt4
NVCC_EIM0
P132
SER0_CTS#
Out
-
CMOS/1.8V
i.MX6 QP/Q/DP/D/DL/S
EIM_D19
Alt4
NVCC_EIM0
P133
GND
-
-
P134
SER1_TX
Out
-
CMOS/1.8V
i.MX6 QP/Q/DP/D/DL/S
EIM_D26
Alt4
NVCC_EIM0
P135
SER1_RX
In
-
CMOS/1.8V
i.MX6 QP/Q/DP/D/DL/S
EIM_D27
Alt4
NVCC_EIM0
P136
SER2_TX
In
-
CMOS/1.8V
i.MX6 QP/Q/DP/D/DL/S
KEY_COL1
Alt4
NVCC_GPIO
P137
SER2_RX
Out
-
CMOS/1.8V
i.MX6 QP/Q/DP/D/DL/S
KEY_ROW1
Alt4
NVCC_GPIO
P138
SER2_RTS#
In
-
CMOS/1.8V
i.MX6 QP/Q/DP/D/DL/S
KEY_COL4
Alt4
NVCC_GPIO
P139
SER2_CTS#
Out
-
CMOS/1.8V
i.MX6 QP/Q/DP/D/DL/S
KEY_ROW4
Alt4
NVCC_GPIO
P140
SER3_TX
Out
-
CMOS/1.8V
i.MX6 QP/Q/DP/D/DL/S
KEY_COL0
Alt4
NVCC_GPIO
P141
SER3_RX
In
-
CMOS/1.8V
i.MX6 QP/Q/DP/D/DL/S
KEY_ROW0
Alt4
NVCC_GPIO
P142
GND
-
-
P143
CAN0_TX
Out
-
CMOS/1.8V
i.MX6 QP/Q/DP/D/DL/S
SD3_CMD
Alt2
NVCC_SD3
P144
CAN0_RX
In
-
CMOS/1.8V
i.MX6 QP/Q/DP/D/DL/S
SD3_CLK
Alt2
NVCC_SD3
P145
CAN1_TX
Out
-
CMOS/1.8V
i.MX6 QP/Q/DP/D/DL/S
SD3_DAT0
Alt2
NVCC_SD3
P146
CAN1_RX
In
-
CMOS/1.8V
i.MX6 QP/Q/DP/D/DL/S
SD3_DAT1
Alt2
NVCC_SD3
P147
VDD_IN
PWR
P148
VDD_IN
PWR
P149
VDD_IN
PWR
P150
VDD_IN
PWR
P151
VDD_IN
PWR
P152
VDD_IN
PWR
P153
VDD_IN
PWR
P154
VDD_IN
PWR
P155
VDD_IN
PWR
P156
VDD_IN
PWR
S1
/ I2C_CAM1_CK
In
PU-2.2K
I2C1
i.MX6 QP/Q/DP/D/DL/S
CSI0_DAT9
Alt4
NVCC_CSI
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