Chapter 3
Hardware
20
Reference Manual
CoreModule 730
Table 3-5
describes the pin signals of the USB2 and USB3 header which consists of 10 right-angle pins in
two rows, with odd/even (1, 2) pin sequence, and 0.079" (2mm) pitch.
Note:
The shaded areas denote power or ground.
Ethernet Interface
The Ethernet solution originates from the 82574IT Gigabit Ethernet controller and consists of both the
Media Access Controller (MAC) and the Physical Layer (PHY) combined into a single component solution.
The Gigabit Ethernet Control Unit is a 64-bit PCIe controller that features enhanced scatter-gather bus
mastering capabilities, which enables the processor to perform high-speed data transfers over the internal
PCIe bus. The bus master capabilities enable the component to process high-level commands and perform
multiple operations, thereby off-loading communication tasks from the CPU. The Ethernet interface offers
the following features:
•
Full duplex or half duplex support at 10 Mbps, 100 Mbps, or 1000 Mbps
•
In full duplex mode, the Ethernet controller adheres to the IEEE 802.3x Flow Control specification.
•
In half duplex mode, performance is enhanced by a proprietary collision reduction mechanism.
•
IEEE 802.3 compatible physical layer to wire transformer
•
IEEE 802.3u Auto-Negotiation support
•
Fast back-to-back transmission support with minimum interframe spacing (IFS).
•
IEEE 802.3x auto-negotiation support for speed and duplex operation
•
3 kB transmit and 3 kB receive FIFOs (helps prevent data underflow and overflow)
•
On-board magnetics (Ethernet isolation transformer)
Table 3-6
describes the pin signals of the Ethernet header which consists of 10 right-angle pins, two rows,
odd/even (1,2) pin sequence, and 0.079" (2mm) pitch.
Table 3-5. USB2 and USB3 Interface Pin Signals (J13)
Pin #
Signal
Description
1
USB-PWR_2
USB2 Power – VCC (+5V +/-5%) power goes to the port through an on
board fuse. Port is disabled if this input is low.
2
USB-PWR_3
USB3 Power – VCC (+5V +/-5%) power goes to the port through an on
board fuse. Port is disabled if this input is low.
3
CONN_USB2_N USB2 Port Data Negative
4
CONN_USB3_N USB3 Port Data Negative
5
CONN_USB2_P
USB2 Port Data Positive
6
CONN_USB3_P
USB3 Port Data Positive
7
USB_GND2
USB2 Ground
8
USB_GND3
USB3 Ground
9
USB_GND2
USB2 Ground
10
USB_GND3
USB3 Ground
Table 3-6. Ethernet Interface Pin/Signal Descriptions (J3)
Pin # Signal
Description
1
GND
Ground
2
GND
3
MDI0+ Media Dependent Interface 0 +/-
4
MDI0-
Содержание CoreModule 730
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Страница 18: ...Chapter 2 Product Overview 14 Reference Manual CoreModule 730 ...
Страница 32: ...Chapter 4 BIOS Setup 28 Reference Manual CoreModule 730 ...
Страница 34: ...Appendix A Technical Support 30 Reference Manual CoreModule 730 ...