ADLINK Technology COM Express Express-BL Скачать руководство пользователя

Страница: 66 / 90

Page 66

7.3.7.2.

PCI and PCIe > PCH-PCIe Configuration

Feature

Options

Description

PCH-PCIe Configuration

Info only

PCI Express Clock Gating

Disabled

Enable

Enable/Disable PCI Express Clock Gating for each root port.

DMI Link ASPM Control

Disabled

Enable

The control of Active State Power Management on both NB side
and SB side of the DMI Link.

DMI Link Extended Synch Control

Disabled

Enable

The control of Extended Synch on SB side of the DMI Link.

PCIe-USB

Glitch

W/A

Disabled

Enable

PCIe-USB Glitch W/A for bad USB device(s) connected behind
PCIE/PEG Port.

PCIE Root Port Function Swapping

Disabled

Enable

Enable/Disable PCI Express PCI Express Root Port Function
Swapping.

Subtractive Decode

Disabled

Enable

Enable/Disable PCI Express Subtractive Decode.

PCIE Ports 1-4 Configuration

4x1 Port

1X2 2X1 Port
2X2 Port
1X4 Port

To configure PCI-E Port 1-4 of PCH.
[4X1]: Port 1-4 (x1) and Port 8 (x1)
[1x2 2x1]: Port 1 (x2), Port 2 (disabled), Ports 3 and Port 4 (x1)
[2x2]: Port 1-2 (x2) and Port 3-4 (x2)/[1x4]:Port 1 (x4), Ports 2-4
(disable)

PCIE Ports 5-8 Configuration

4x1 Port

1X2 2X1 Port

To configure PCI-E Port 5-7 of PCH.
[4X1] : Port 5-8 (x1) and Port 8 (x1)
[1x2 2x1]: Port 5 (x2), Port 6 (disabled), Ports 7 and Port 8 (x1)

PCI Express Root Port 1~7

Submenu

Configure PCI Express Root Port 1~7 setting.

PCI and PCIe > PCH-PCIe Configuration > PCI Express Root Port

Feature

Options

Description

PCI Express Root Port

Disabled

Enable

Control the PCI Express Root Port.

ASPM Support

Disabled

Enable

Set the ASPM Level: Force L0s - Force all links to L0s
State: AUTO - BIOS auto configure: DISABLE - Disables
ASPM

L1 Substates

Disabled

Enable

PCI Express L1 Substates settings.

URR

Disabled

Enable

Enable/Disable PCI Express Unsupported Request
Reporting.

FER

Disabled

Enable

Enable/Disable PCI Express Device Fatal Error Reporting.

NFER

Disabled

Enable

Enable/Disable PCI Express Device Non-Fatal Error
Reporting.

CER

Disabled

Enable

Enable/Disable PCI Express Device Correctable Error
Reporting.

CTO

Disabled

Enable

Enable/Disable PCI Express Completion Timer TO.

SEFE

Disabled

Enable

Enable/Disable Root PCI Express System Error on Fatal
Error.

Содержание COM Express Express-BL

Страница 1: ...Leading EDGE COMPUTING Express BL User s Manual Manual Revision 1 2 Revision Date January 2 2018 Part Number 50 1J067 1020...

Страница 2: ...ypos add 2x PCIe x1 by build option LVDS DE mode and H V Sync mode add FAN_PWMOUT SER0_TX SER1_TX LID SLEEP PCIE_TX7 RX7 comments correct DDI pin D16 C33 C37 signals to _CTRLDATA_AUX correct PCIe Adap...

Страница 3: ...en if advised of the possibility of such damages Environmental Responsibility ADLINK is committed to fulfill its social responsibility to global environmental preservation through compliance with the...

Страница 4: ...2 11 Power Specifications 12 2 12 Power Consumption 12 2 13 Operating Temperatures 12 2 14 Environmental 12 2 15 Specification Compliance 12 2 16 Operating Systems 12 2 17 Functional Diagram 13 2 18 M...

Страница 5: ...Module Type Definition 33 3 4 7 Power and Ground 33 4 Module Interfaces and Configuration 34 4 1 Connector Switch and LED Locations 34 4 1 1 Express BL and the DB40 Module connected 34 4 2 40 pin Mult...

Страница 6: ...tem Information 52 7 2 2 Processor Information 52 7 2 3 PCH Information 52 7 2 4 System Management 53 7 2 5 System Date and Time 56 7 3 Advanced 57 7 3 1 CPU 57 7 3 2 Memory 58 7 3 3 Graphics 59 7 3 4...

Страница 7: ...EI Status Codes 77 8 2 4 PEI Beep Codes 79 8 2 5 DXE Status Codes 79 8 2 6 DXE Beep Codes 82 8 2 7 ACPI ASL Checkpoint 82 8 3 OEM Reserved Checkpoint Ranges 82 9 Mechanical Information 83 9 1 Board to...

Страница 8: ...lear Video HD Technology Advanced Scheduler 2 0 1 0 XPDM support and DirectX Video Acceleration DXVA support for full AVC VC1 MPEG2 hardware decode Graphics outputs include VGA LVDS and three DDI port...

Страница 9: ...0 Intel AVX2 Intel AES NI PCLMULQDQ Instruction Intel Device Protection Technology with Intel Secure Key Intel TSXNI Note The availability of the features may vary between processor SKUs Cache 6MB fo...

Страница 10: ...nGL 4 2 support Note the availability of the features may vary between OS Win 7 8 1 WES 7 WE8 Std Linux Display Interface support VGA 300MHz DAC analog monitor support up to QXGA 2048 x 1536 LVDS sing...

Страница 11: ...O W83627DHG on carrier board 3 0x2F8 Yes 2 8 Trusted Platform Module TPM Chipset Atmel AT97SC3204 Type TPM 1 2 2 9 SEMA Board Controller Type ADLINK Smart Embedded Management Agent SEMA Supports Volta...

Страница 12: ...n 2 13 Operating Temperatures Standard C to 60 C wide voltage input Extreme Rugged 40 C to 85 C standard voltage input 2 14 Environmental Humidity 5 90 RH operating non condensing 5 95 RH storage and...

Страница 13: ...Express BL Page 13 2 17 Functional Diagram AB CD FDI DMI...

Страница 14: ...Page 14 2 18 Mechanical Dimensions...

Страница 15: ...GBE0_MDI0 B13 SMB_CK C13 USB_SSRX3 D13 USB_SSTX3 A14 GBE0_CTREF B14 SMB_DAT C14 GND D14 GND A15 SUS_S3 B15 SMB_ALERT C15 DDI1_PAIR6 D15 DDI1_CTRLCLK_AUX A16 SATA0_TX B16 SATA1_TX C16 DDI1_PAIR6 D16 DD...

Страница 16: ...0 B54 GPO1 C54 TYPE0 D54 PEG_LANE_RV A55 PCIE_TX4 B55 PCIE_RX4 C55 PEG_RX1 D55 PEG_TX1 A56 PCIE_TX4 B56 PCIE_RX4 C56 PEG_RX1 D56 PEG_TX1 A57 GND B57 GPO2 C57 TYPE1 D57 TYPE2 A58 PCIE_TX3 B58 PCIE_RX3...

Страница 17: ...B94 VGA_VSYNC C94 PEG_RX13 D94 PEG_TX13 A95 SPI_MOSI B95 VGA_I2C_CK C95 PEG_RX13 D95 PEG_TX13 A96 TPM_PP B96 VGA_I2C_DAT C96 GND D96 GND A97 TYPE10 B97 SPI_CS C97 RSVD D97 RSVD A98 SER0_TX CAN_TX B98...

Страница 18: ...V signal level I O 3 3V Bi directional signal 3 3V tolerant I O 5V Bi directional signal 5V tolerant I O 3 3Vsb Input 3 3V tolerant active in standby state P Power Input Output REF Reference voltage o...

Страница 19: ...al Pin Description I O PU PD Comment VGA_RED B89 Red for monitor Analog DAC output designed to drive a 37 5 Ohm equivalent load O Analog PD 150R shall also be terminated on the carrier with 150 resist...

Страница 20: ...rol O 3 3V PD 100K LVDS_I2C_CK A83 DDC lines used for flat panel detection and control I O OD 3 3V PU 2k2 3 3V LVDS_I2C_DAT A84 DDC lines used for flat panel detection and control I O OD 3 3V PU 2k2 3...

Страница 21: ...PHY and may be as low as 0V and as high as 3 3V The reference voltage output shall be current limited on the Module In the case in which the reference is shorted to ground the current shall be 250 mA...

Страница 22: ...hannel 3 Transmit Output differential pair O PCIE AC coupled on Module PCIE_RX3 PCIE_RX3 B58 B59 PCI Express channel 3 Receive Input differential pair I PCIE AC coupled off Module PCIE_TX4 PCIE_TX4 A5...

Страница 23: ...A37 A36 USB differential data pairs for Port 5 I O 3 3VSB USB 1 1 2 0 compliant USB7 USB7 B37 B37 USB differential data pairs for Port 6 I O 3 3VSB USB 1 1 2 0 compliant USB_0_1_OC B44 USB over curren...

Страница 24: ...carrier board SPI BIOS flash O 3 3VSB SPI_POWER A91 Power supply for Carrier Board SPI sourced from Module nominally 3 3V The Module shall provide a minimum of 100mA on SPI_POWER Carriers shall use le...

Страница 25: ...gh TPM chip has an internal pull down This signal is used to indicate Physical Presence to the TPM I 3 3V PD 10k 3 3V PD only when TPM on module 3 3 14 SMBus Signal Pin Description I O PU PD Comment S...

Страница 26: ...el input I CMOS Power rail tolerance 5V 12V SER1_TX A101 General purpose serial port transmitter TTL level output O CMOS Power rail tolerance 5V 12V There shall be PD on carrier board SER1_RX A102 Gen...

Страница 27: ...U 8 2k 3 3VSB LID A103 LID button Low active signal used by the ACPI operating system for a LID switch I OD 3 3VSB PU 10k 3 3VSB Emulated on GPIO BIOS SLEEP B103 Sleep button Low active signal used by...

Страница 28: ...C coupled off module USB_SSTX2 USB_SSTX2 D9 D10 Additional Transmit signal differential pairs for the SuperSpeed USB data path on USB2 O PCIE AC coupled on module USB_SSRX3 USB_SSRX3 C12 C13 Additiona...

Страница 29: ...DI1_DDC_AUX_SEL is floating I O PCIE PD 100K DP1_AUX DDI1_CTRLCLK_AUX D15 IF DDI1_DDC_AUX_SEL pulled high I O OD 3 3V HDMI1_CTRLCLK PU 2 2K 3 3V when DDC_AUX_SEL is high IF DDI1_DDC_AUX_SEL is floatin...

Страница 30: ...r the DP AUX signals If pulled high the AUX pair contains the CRTLCLK and CTRLDATA signals I 3 3V PD 1M DDI 3 Signal Pin Description I O PU PD Comment DDI3_PAIR0 DDI3_PAIR0 DDI3_PAIR1 DDI3_PAIR1 DDI3_...

Страница 31: ...A2 D40 DDI2_PAIR0 DP2_LANE0 TMDS2_DATA2 D42 DDI2_PAIR1 DP2_LANE1 TMDS2_DATA1 D43 DDI2_PAIR1 DP2_LANE1 TMDS2_DATA1 D46 DDI2_PAIR2 DP2_LANE2 TMDS2_DATA0 D47 DDI2_PAIR2 DP2_LANE2 TMDS2_DATA0 D49 DDI2_PAI...

Страница 32: ...CI Express Graphics transmit differential pairs I PCIE AC couple off module PEG_TX0 PEG_TX0 PEG_TX1 PEG_TX1 PEG_TX2 PEG_TX2 PEG_TX3 PEG_TX3 PEG_TX4 PEG_TX4 PEG_TX5 PEG_TX5 PEG_TX6 PEG_TX6 PEG_TX7 PEG_...

Страница 33: ...inatorial logic that monitors the module TYPE pins and keeps power off e g deactivates the ATX_ON signal for an ATX power supply if an incompatible module pin out type is detected The Carrier Board lo...

Страница 34: ...s LEDs and switches that are used on the module but are not included in the standard PICMG specification 4 1 Connector Switch and LED Locations 40 pin Multi Purpose CD AB Fan 4 pin Fan BIOS Defaults R...

Страница 35: ...3V provide from COM module 28 BMC Program interface continued OCD0B Include a jumper to connect OCD0A via 1K0 pull up to 3 3V_BMC 9 GND 29 PWRBTN 10 BIOS_DIS0 30 SYS_RESET 11 RST 31 CB_RESET 12 CLK33_...

Страница 36: ...5 1 4 Exception Codes below LED2 Green Power Source 3Vcc S0 LED ON S3 S4 S5 LED OFF ECO mode LED OFF LED3 Red BMC output and same signal as WDT B27 on BtB connector Module power up LED OFF Watchdog c...

Страница 37: ...Express BL Page 37 4 4 Fan Connector Connector Type JVE 24W1125A 04M00 Pin Orientation 1 2 3 4 Pin Definitions Pin Signal 1 FAN_PWMOUT 2 FAN_TACHIN 3 Ground 4 5V...

Страница 38: ...following steps 1 Shut down the system 2 Press the BIOS Setup Defaults Reset Button continuously and boot up the system You can release the button when the BIOS prompt screen appears 3 The BIOS prompt...

Страница 39: ...Express BL Page 39 4 6 Express BL Switch Settings 4 6 1 Switch Locations PCI Express Configuration Switch BIOS Select and Mode Configuration Switch...

Страница 40: ...to PICMG mode will configure the BIOS chips on the module as SPI0 and SPI1 In PICMG mode a BIOS chip cannot be placed in the SPI0 slot on the carrier In dual BIOS Failsafe mode both BIOS chips on the...

Страница 41: ...Carrier to support bifurbication of the CPU s PEG interface PCIe x16 The card reroutes the PCIe x16 to two x8 and allows testing of two independent PCIe add on cards with x8 x4 x2 x1 width To use the...

Страница 42: ...t counter counts the number of boot attempts Watchdog Timer Type II Set Reset Disable Watchdog Timer Features auto reload at power up System Restart Cause Power loss BIOS Fail Watchdog Internal Reset...

Страница 43: ...urrent Function 5 1 2 Main Current The BMC of the Express BL implements a current monitor The current can be read by calling the SEMA function Get Main Current The function returns four 16 bit values...

Страница 44: ...supported Exception Code Error Message 0 NOERROR 2 NO_SUSCLK 3 NO_SLP_S5 4 NO_SLP_S4 5 NO_SLP_S3 6 BIOS_FAIL 7 RESET_FAIL 8 POWER_FAIL 9 LOW_VIN 10 11 V3 3V 12 V1P05S 13 V3 3V 14 VMEM 15 V5 0V 16 18 C...

Страница 45: ...I Interrupts 4GB 20MB 4GB 19MB 1 FEC00000 FECFFFFF 1 MB APIC Configuration Space 15MB 16MB F00000 FFFFFF 1 MB ISA Hole 1MB 15MB 100000 EFFFFF 14MB Main Memory 0K 1MB 00000 FFFFFF 1MB DOS Compatibility...

Страница 46: ...92 Reset Bit 0 Fast Gate A20 Bit 1 091 93 9F DMA Controller 0A0 0B1 and 0B4 0BD Interrupt controller 2 8259 equivalent 0B2 and 0B3 APM control and status port respectively 0C0 0DF DMA Controller 0E0 0...

Страница 47: ...able 0 Counter 0 N A No 1 Keyboard controller IRQ1 via SERIRQ No 2 Cascade interrupt from slave PIC N A No 3 Serial Port 2 COM2 IRQ3 via SERIRQ PIRQ Note 1 4 Serial Port 1 COM1 IRQ4 via SERIRQ PIRQ No...

Страница 48: ...RQ11 via SERIRQ Note 1 12 PS 2 Mouse IRQ12 via SERIRQ Note 1 13 FERR logic N A Note 1 14 SATA Primary IRQ14 via SERIRQ Note 1 15 SATA Secondary IRQ15 via SERIRQ Note 1 16 N A P E G Root Port Intel HDA...

Страница 49: ...Serial I O UART Controller 0 00h 15h 06h Internal Intel Serial I O UART Controller 1 00h 16h 00h Internal Intel Management Engine Interface 1 00h 16h 01h Internal Intel Management Engine Interface 2...

Страница 50: ...NTA 16 INTB 17 INTC 18 INTD 19 INTH 23 INTA 16 Int1 INTB 17 INTC 18 INTD 19 INTA 16 INTB 17 INTC 18 INTD 19 INTA 16 Int2 INTC 18 INTD 19 INTA 16 INTB 17 INTC 18 INTD 19 INTA 16 INTB 17 Int3 INTD 19 IN...

Страница 51: ...t setting options are presented in bold and the function of each setting is described in the right hand column of the respective table Main Advanced Security Boot Save Exit System Information Processo...

Страница 52: ...on CPU Brand String Info only Display CPU Brand Name Frequency Info only Display CPU Frequency Processor ID Info only Display CPU ID Stepping Info only Display CPU Stepping Number of Processors Info o...

Страница 53: ...g Date Read only Display SMC manufacturing date Last Repair Date Read only Display SMC last repair date MAC ID Read only Display SMC MAC ID 7 2 4 2 System Management Temperatures and Fan Speed Feature...

Страница 54: ...ly Total Runtime Read only The returned value specifies the total time in minutes the system is running in S0 state Current Runtime Read only The returned value specifies the time in seconds the syste...

Страница 55: ...Backlight Bright 255 The value range starts by 0 and ends by 255 7 2 4 8 System Management Smart Fan Feature Options Description Smart Fan Info only CPU Smart FanTemperature Source CPU Sensor System...

Страница 56: ...te Weekday MM DD YYYY Requires the alpha numeric entry of the day of the week day of the month calendar month and all 4 digits of the year indicating the century and year Fri XX XX 20XX System Time HH...

Страница 57: ...lay cache info L1 Code Cache Info only Display cache info L2 Cache Info only Display cache info L3 Cache Inf o only Display cache info Limit CPUID Maximum Disabled Enabled When Enabled the processor w...

Страница 58: ...Total Memory Memory Voltage Info only Display Memory Voltage DIMM 0 1 Info only Display DIMM 0 1 CAS Latency tCL Info only Display CAS Latency tCL Minimum delay time Info only Display Minimum delay ti...

Страница 59: ...imary PCIE Internal Graphics Auto Disabled Enable Keep IGD enabled based on the setup options Aperture Size 128MB 256MB 512MB Select the Aperture Size DVMT Pre Allocated XXM Select DVMT 5 0 Pre Alloca...

Страница 60: ...24X768 LVDS2 1280X800 1920X1080 2048X1536 Select LCD panel used by Internal Graphics Device by selecting the appropriate setup item Active LFP No LVDS Edp Port A Select the Active LFP Configuration Pa...

Страница 61: ...password unlock in the OS is enabled LED Locate Enabled Disabled If enabled indicates that the LED SGPIO hardware is attached and ping to locate feature is enabled on the OS IRRT Only on ESATA Enable...

Страница 62: ...elays and time outs Info only USB transfer time out 1 sec 5 sec 10 sec 20 sec The time out value for Control Bulk and Interrupt transfers Device reset time out 10 sec 20 sec 30 sec 40 sec USB mass sto...

Страница 63: ...password Confirmation Prompt MEBx Debug Message Output Enabled Disabled Enable MEBx debug message output Un Configure ME Enabled Disabled Un Configure ME without password Amt Wait Timer 0 Set timer to...

Страница 64: ...Auto 128 Bytes 256 Bytes 512 Bytes 1024 Bytes 2048 Bytes 4096 Bytes Select Maximum Payload size or let BIOS decide Auto Maximum Read Request Auto 128 Bytes 256 Bytes 512 Bytes 1024 Bytes 2048 Bytes 4...

Страница 65: ...present or not PEG0 Gen X Auto Gen1 Gen2 Gen3 Configure PEG0 B0 D1 F0 Gen1 Gen3 Enable PEG Disabled Enabled Auto Enable Disable the PEG Detect Non compliance Device Disabled Enable Detect Non Complia...

Страница 66: ...x1 2x2 Port 1 2 x2 and Port 3 4 x2 1x4 Port 1 x4 Ports 2 4 disable PCIE Ports 5 8 Configuration 4x1 Port 1X2 2X1 Port To configure PCI E Port 5 7 of PCH 4X1 Port 5 8 x1 and Port 8 x1 1x2 2x1 Port 5 x...

Страница 67: ...y 10 Prefetchable Memory Range for this Root Bridge Reserved I O 4 Reserved I O 4K 8K 12K 16K 48K Range for this Root Bridge PCIE LTR Disabled Enable PCIE Latency Reporting Enable Disable PCIE LTR Loc...

Страница 68: ...IO device N5104D Super IO Configuration Info only Serial Port 1 Configuration Serial Port Device Settings Change Settings Enabled Disabled IO 240h IRQ 10 Auto IO 240h IRQ 10 IO 240h IRQ 10 11 12 IO 24...

Страница 69: ...Auto Control Detection of the Azalia device Disabled Azalia will be unconditionally disabled Enabled Azalia will be unconditionally enabled Auto Azalia will be enabled if present disabled other Azalia...

Страница 70: ...Mode Disabled Enable With this mode enabled only text will be sent This is to capture Terminal data Resolution 100x31 Disabled Enable Enables or disables extended terminal resolution Legacy OS Redirec...

Страница 71: ...t be applied unless Accept changes is pressed Apply settings immediately Apply item Changes will be applied immediately but forgotten after reboot This mode of making changes is more likely to cause p...

Страница 72: ...Enable Disable the High Precision Event Timer Security BIOS Security Configuration Submenu Trusted Computing Submenu GPI with interrupt Enabled Disabled GPI with interrupt Enabled Disabled Intel TXT L...

Страница 73: ...eature Options Description CSM Support Enabled Disable This option controls if CSM will be launched CSM16 Module Version Info only GateA20 Active Upon Request Always UPON REQUEST GA20 can be disabled...

Страница 74: ...em Save Changes and Reset Discard Changes and Reset Reset the system without saving any changes Discard Changes and Reset 7 6 2 Save Options Feature Options Description Save Changes Save Changes done...

Страница 75: ...el Platform Innovation Framework for EFI the Framework The Framework refers the following boot phases which may apply to various status code checkpoint descriptions Security SEC initial low level init...

Страница 76: ...iption 0x0 Not used Progress Codes 0x1 Power on Reset type detection soft hard 0x2 AP initialization before microcode loading 0x3 North Bridge initialization before microcode loading 0x4 South Bridge...

Страница 77: ...ge module specific 0x1D 0x2A OEM pre memory initialization codes 0x2B Memory initialization Serial Presence Detect SPD data reading 0x2C Memory initialization Memory presence detection 0x2D Memory ini...

Страница 78: ...t installed 0x56 Invalid CPU type or Speed 0x57 CPU mismatch 0x58 CPU self test failed or possible CPU cache error 0x59 CPU micro code is not found or micro code update is failed 0x5A Internal CPU err...

Страница 79: ...tarted 3 DXEIPL was not found 3 DXE Core Firmware Volume was not found 7 Reset PPI is not available 4 Recovery failed 4 S3 Resume failed 8 2 5 DXE Status Codes Status Code Description 0x60 DXE Core is...

Страница 80: ...nitialization South Bridge module specific 0x77 South Bridge DXE Initialization South Bridge module specific 0x78 ACPI module initialization 0x79 CSM initialization 0x7A 0x7F Reserved for future AMI D...

Страница 81: ...s hot plug 0xB6 Clean up of NVRAM 0xB7 Configuration Reset reset of NVRAM settings 0xB8 0xBF Reserved for future AMI codes 0xC0 0xCF OEM BDS initialization codes DXE Error Codes 0xD0 CPU initializatio...

Страница 82: ...em is entering S5 sleep state 0x10 System is waking up from the S1 sleep state 0x20 System is waking up from the S2 sleep state 0x30 System is waking up from the S3 sleep state 0x40 System is waking u...

Страница 83: ...connector with 0 5mm for a stacking height of 5 mm This connector can be used with 5 mm through hole standoffs SMT type Tyco 3 6318491 6 Foxconn QT002206 4141 3H 220 pin board to board connector with...

Страница 84: ...all COM Express modules 9 2 2 Heat Sinks A heat sink can be used as a thermal solution for a specific COM Express module and can have a fan or be fanless depending on the thermal requirements 9 2 3 I...

Страница 85: ...heatsink to the module Step 4 Place the COM Express module and heatsink assembly onto the connectors on the carrier board as shown Then press down on the module until it is firmly seated on the carrie...

Страница 86: ...Page 86 Step 6 If you are installing a heatsink with a fan plug the fan connector into the carrier board as shown...

Страница 87: ...ition to the choice of 5 mm or 8mm board to board connectors there is the choice of Top and Bottom mounting In Top mounting the threaded standoffs are on the carrier board and the thermal solution is...

Страница 88: ...ed standoffs are DIP type and through hole standoffs are SMT type Other types not listed are available upon request 5mm through hole standoff SMT type P N 33 72000 0050 5mm threaded standoff DIP type...

Страница 89: ...s and warnings on the equipment should be noted Please keep this equipment from humidity Do not use this equipment near water or a heat source Lay this equipment on a reliable surface when install A d...

Страница 90: ...ll Free 1 800 966 5200 USA only Fax 1 408 360 0222 Email info adlinktech com ADLINK Technology China Co Ltd Address 300 Fang Chun Rd Zhangjiang Hi Tech Park Pudong New Area Shanghai 201203 China Tel 8...

Результаты поиска

Содержание COM Express Express-BL

Отзывы:

Похожие инструкции для COM Express Express-BL

Бренды по названию

Популярные бренды

ADLINK Technology COM Express Express-BL, Руководство пользователя

Результаты поиска

Содержание COM Express Express-BL

Отзывы:

Похожие инструкции для COM Express Express-BL

Бренды по названию

Популярные бренды