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Express-BD7

Pinouts and Signal Descriptions

Signal

Pin

Description

I/O

PU/PD

Comment

PC
PCIE_TX10-

A77
A78

PCI Express channel 10, Transmit
Output differential pair.

O PCIE

AC coupled on Module

PC
PCIE_RX10-

B77
B78

PCI Express channel 10, Receive
Input differential pair.

I PCIE

AC coupled off Module

PC
PCIE_TX11-

A81
A82

PCI Express channel 11, Transmit
Output differential pair.

O PCIE

AC coupled on Module

PC
PCIE_RX11-

B81
B82

PCI Express channel 11, Receive
Input differential pair.

I PCIE

AC coupled off Module

PC
PCIE_TX12-

A39
A40

PCI Express channel 12, Transmit
Output differential pair.

O PCIE

AC coupled on Module

PC
PCIE_RX12-

B39
B40

PCI Express channel 12, Receive
Input differential pair.

I PCIE

AC coupled off Module

PC
PCIE_TX13-

A36
A37

PCI Express channel 13, Transmit
Output differential pair.

O PCIE

AC coupled on Module

PC
PCIE_RX13-

B36
B37

PCI Express channel 13, Receive
Input differential pair.

I PCIE

AC coupled off Module

PC
PCIE_TX14-

A25
A26

PCI Express channel 14, Transmit
Output differential pair.

O PCIE

AC coupled on Module

PC
PCIE_RX14-

B25
B26

PCI Express channel 14, Receive
Input differential pair.

I PCIE

AC coupled off Module

PC
PCIE_TX15-

A22
A23

PCI Express channel 15, Transmit
Output differential pair.

O PCIE

AC coupled on Module

PC
PCIE_RX15-

B22
B23

PCI Express channel 15, Receive
Input differential pair.

I PCIE

AC coupled off Module

PCIE_
PCIE_CLK_REF-

A88
A89

PCI Express Reference Clock
output for all PCI Express and PCI
Express Graphics Lanes.

O PCIE

3.3.5.

LPC Bus

Signal

Pin

Description

I/O

PU/PD

Comment

LPC_AD[0:3] B4-B7 LPC multiplexed address, command

and data bus

I/O 3.3V

Chipset has internal pull-up

LPC_FRAME# B3

LPC frame indicates the start of an
LPC cycle

O 3.3V

LPC_DRQ0#
LPC_DRQ1#

B8
B9

LPC serial DMA request

I 3.3V

Platform has internal PU

LPC_SERIRQ A50

LPC serial interrupt

I/O OD
3.3V

PU 8.2k
3.3V

LPC_CLK

B10

LPC clock output –33MHz nominal

O 3.3V

Note:

eSPI and LPC buses are muxed. Express-BD7 module only supports LPC interface.

3.3.6. USB

Signal

Pin

Description

I/O

PU/PD

Comment

USB0+
USB0-

A46
A45

USB differential data pairs for Port 0

I/O
3.3VSB

USB 1.1/ 2.0 compliant

Содержание COM Express Express-BD7

Страница 1: ...ng EDGE COMPUTING Express BD7 User s Manual COM Express Basic Size Type 7 Module with up to 16 cores Intel Xeon D and Pentium D SoC Manual Rev 1 2 Revision Date November 18 2021 Part Number 50M 00057...

Страница 2: ...responsibility to global environmental preservation through compliance with the European Union s Restriction of Hazardous Substances RoHS directive and Waste Electrical and Electronic Equipment WEEE...

Страница 3: ...bug 5 2 11 Power Specifications 6 2 12 Power Consumption 6 2 13 Operating Temperatures 6 2 14 Environmental 6 2 15 Specification Compliance 6 2 16 Operating Systems 6 2 17 Functional Diagram 7 2 18 Me...

Страница 4: ...dress Range Map 40 6 5 APIC Interrupt Mapping 41 6 6 PCI Configuration Space Map 42 6 7 PCI Interrupt Routing Map 43 6 8 SMBus Address Table 43 7 BIOS Setup 45 7 1 Menu Structure 45 7 2 Main 46 7 3 Ad...

Страница 5: ...iagram 7 Figure 2 Express BD7 Mechanical Drawing 8 Figure 3 Express BD7 Connector Switch and LED Locations 25 Figure 4 Express BD7 and the DB40 Debug Module 25 Figure 5 cExpress Switch Locations 31 Fi...

Страница 6: ...26 Table 3 Express BD7 LED Descriptions 27 Table 4 XDP Debug Header Pin Definition 28 Table 5 Fan Connector Pin Definition 29 Table 6 BIOS Select and Mode Configuration Switch Settings 31 Table 7 SEM...

Страница 7: ...ry at 1866 2133 2400 MHz dependent on SoC SKU to provide excellent overall performance An integrated Intel 10G Ethernet controller supports two 10GBASE KR interfaces relevant sideband signals and NC S...

Страница 8: ...2 Introduction This page intentionally left blank...

Страница 9: ...Note Availability of features may vary between processor SKUs Cache 24MB for D1577 18MB for D1559 12MB for D1548 D1539 6MB for D1527 D1519 3MB for D1508 Memory Dual channel ECC or non ECC 1866 2133 2...

Страница 10: ...rogrammable for indicating ACT LINK Speed 10G_SFP_SDA and 10G_SFP_SCL dedicated for Optical PHY use connect to external SFP module 10G_SDP Software Definable Pin for general purpose 2 4 Gigabit Ethern...

Страница 11: ...27DHG on carrier board 4 0x3F8 Yes COM 4 Supported by Super I O W83627DHG on carrier board 3 0x2F8 Yes 2 8 Trusted Platform Module TPM z Chipset Infineon z Type TPM 2 0 2 9 SEMA Board Controller z Typ...

Страница 12: ...rating Temperature 0 C to 60 C Wide Voltage Input Storage 20 C to 70 C Extreme Rugged Operating Temperature optional 40 C to 85 C Standard Voltage Input dependent on SoC SKU build option support Stora...

Страница 13: ...USB 2 0 port 0 1 2 3 4x USB 3 0 upgrade port 0 1 2 3 UART0 1 SPI 1 BIOS SODIMM 2 Up to 2400 MHz 4 16 GB ECC non ECC DDR4 1 PCIe lane Gen2 port 6 SPI_CS 1x 10G KR 1x 10G KR 6 PCIe lanes Gen2 port 0 5...

Страница 14: ...ll dimensions are shown in millimeters Tolerances should be 0 25mm unless otherwise noted The tolerances on the module connector locating peg holes dimensions 16 50 6 00 and 16 50 18 00 should be 0 10...

Страница 15: ...fixed C11 GND fixed D11 GND fixed A12 GBE0_MDI0 B12 PWRBTN C12 USB_SSRX3 D12 USB_SSTX3 A13 GBE0_MDI0 B13 SMB_CK C13 USB_SSRX3 D13 USB_SSTX3 A14 GBE0_CTREF B14 SMB_DAT C14 GND D14 GND A15 SUS_S3 B15 S...

Страница 16: ...TX16 A54 GPI0 B54 GPO1 C54 TYPE0 D54 RSVD A55 PCIE_TX4 B55 PCIE_RX4 C55 PCIE_RX17 D55 PCIE_TX17 A56 PCIE_TX4 B56 PCIE_RX4 C56 PCIE_RX17 D56 PCIE_TX17 A57 GND B57 GPO2 C57 TYPE1 D57 TYPE2 A58 PCIE_TX3...

Страница 17: ...GND A94 SPI_CLK B94 NCSI_CRS_DV C94 PCIE_RX29 D94 PCIE_TX29 A95 SPI_MOSI B95 NCSI_TXD1 C95 PCIE_RX29 D95 PCIE_TX29 A96 TPM_PP B96 NCSI_TXD0 C96 GND D96 GND A97 TYPE10 B97 SPI_CS C97 RSVD D97 RSVD A98...

Страница 18: ...O 5V Output 5V signal level I O 3 3V Bi directional signal 3 3V tolerant I O 5V Bi directional signal 5V tolerant I O 3 3Vsb Input 3 3V tolerant active in standby state P Power Input Output REF Refere...

Страница 19: ...troller 0 Media Dependent Interface Differential Pairs 0 1 2 3 The MDI can operate in 1000 100 and 10Mbit sec modes Some pairs are unused in some modes according to the following 1000BASE T 100BASE TX...

Страница 20: ...IE_TX2 PCIE_TX2 A61 A62 PCI Express channel 2 Transmit Output differential pair O PCIE AC coupled on Module PCIE_RX2 PCIE_RX2 B61 B62 PCI Express channel 2 Receive Input differential pair I PCIE AC co...

Страница 21: ...CIE_TX14 A25 A26 PCI Express channel 14 Transmit Output differential pair O PCIE AC coupled on Module PCIE_RX14 PCIE_RX14 B25 B26 PCI Express channel 14 Receive Input differential pair I PCIE AC coupl...

Страница 22: ...lient may detect the presence of a USB host on USB0 A high value indicates that a host is present I 3 3VSB Not Supported Limitation of this platform 3 3 7 USB Root Segmentation All USB from XHCI contr...

Страница 23: ...internal pull down This signal is used to indicate Physical Presence to the TPM I 3 3V PD 100k 3 3V PD only when TPM on module 3 3 10 SMBus Signal Pin Description I O PU PD Comment SMB_CK B13 System M...

Страница 24: ...TTL level input I CMOS PU 10k 5V Power rail tolerance 5V 12V SER1_TX A101 General purpose serial port transmitter TTL level output O CMOS PU 10k 5V Power rail tolerance 5V 12V SER1_RX A102 General pur...

Страница 25: ...ernal power management event I 3 3VSB PU 10k 3 3VSB LID A103 LID button Low active signal used by the ACPI operating system for a LID switch I OD 3 3VSB PU 47k 3 3VSB SLEEP B103 Sleep button Low activ...

Страница 26: ...d USB data path on USB2 I PCIE AC coupled off module USB_SSTX2 USB_SSTX2 D9 D10 Additional Transmit signal differential pairs for the SuperSpeed USB data path on USB2 O PCIE AC coupled on module USB_S...

Страница 27: ...ignal for serial data transfers between the MAC and an external PHY O 3 3VSB 10G_PHY_MDC_SCL0 C46 I 2 C Mode I 2 C Data signal of the 2 wire management interface used for serial data transfers between...

Страница 28: ...r 10GbE port 2 3 are also transferred through this pin 10G_LED_SCL C37 I2 C Clock signal of the 2 wire that transfers all LED signals and additional Strapping signal for I2 C or MDIO mode of Optical P...

Страница 29: ...82 PCI Express channel 25 Transmit Output differential pair O PCIE AC coupled on Module PCIE_RX25 PCIE_RX25 C81 C82 PCI Express channel 25 Receive Input differential pair I PCIE AC coupled off Module...

Страница 30: ...o PCI NC GND GND Pinout Type 5 no IDE no PCI GND NC NC Pinout Type 6 no IDE no PCI GND NC GND Pinout Type 7 server level with 10GbE The Carrier Board should implement combinatorial logic that monitors...

Страница 31: ...on the module but are not included in the PICMG standard specification 4 1 Connector Switch and LED Locations 40 pin Multi Purpose CD AB Fan 4 pin Fan BIOS Defaults Reset Switch Figure 3 Express BD7...

Страница 32: ...SPI Program interface SPI_BIOS_ CLK 14 OCD0A 33 3V3_LPC 13 BMC Program interface cont d OCD0B 32 GND 12 PWRBTN PU 10k 3 3VSB 31 BIOS_DIS0 PU 10k 3 3VSB 11 SYS_RESET PU 10k 3 3VSB 30 RST 10 CB_RESET PU...

Страница 33: ...4 Exception Codes below LED2 Green Power Source 3Vcc S0 LED ON S3 S4 S5 LED OFF ECO mode LED OFF LED3 Red BMC output and same signal as WDT B27 on BtB connector Module power up LED OFF Watchdog counti...

Страница 34: ...rocessor 28 OBSDATA_D0 CFG 12 2 I Processor 29 OBSDATA_B1 CFG 5 2 I O Processor 30 OBSDATA_D1 CFG 13 2 I Processor 31 GND GND NA 32 GND GND NA 33 OBSDATA_B2 CFG 6 2 I O Processor 34 OBSDATA_D2 CFG 14...

Страница 35: ...Connector Pinouts on Module 29 4 5 Fan Connector Connector Type JVE 24W1125A 04M00 Pin Orientation 1 2 3 4 Pin Assignment Name Signal 1 FAN_PWMOUT 2 FAN_TACHIN 3 Ground 4 5V Table 5 Fan Connector Pin...

Страница 36: ...perform the following steps 1 Shut down the system 2 Press the BIOS Setup Defaults RESET Button continuously and boot up the system You can release the button when the BIOS prompt screen appears 3 The...

Страница 37: ...SPI0 slot on the carrier In dual BIOS Failsafe mode both BIOS chips on the module are configured as SPI1 Only one of the two is connected to the SPI bus at any given time In case of failure of the pri...

Страница 38: ...nfiguration IIO0 Configuration IOU1 IIO PCIe Port 3 to x8x8 PCIex16 to two x8 Adapter Card Model P16TO28 Part No 91 79301 0010 4 9 PCIe x8 to two x4 Adapter Card The Express BD7 can be used with the P...

Страница 39: ...are stored in flash Power cycles counter Boot counter Counts the number of boot attempts Watchdog Timer Set Reset Disable Watchdog Timer Features auto reload at power up System Restart Cause Power los...

Страница 40: ...SEMA Onboard Voltage Monitor 5 1 2 Main Current The BMC of the Express BD7 implements a current monitor The current can be read by calling the SEMA function Get Main Current The function returns four...

Страница 41: ...is removed Therefore a Clear Exception Code command is not needed or supported Exception Code Error Message 0 NOERROR 2 NO_SUSCLK 3 NO_SLP_S5 4 NO_SLP_S4 5 NO_SLP_S3 6 BIOS_FAIL 7 RESET_FAIL 8 RESETIN...

Страница 42: ...C Flags The BMC Flags register returns the last detected Exception Code since power up and shows the BIOS in use and the power mode Bit Description 0 4 Exception Code 6 0 AT mode 1 ATX mode 7 0 Standa...

Страница 43: ...ble PAE set FEC4 8000h FEC4 FFFFh PCI Express Port 8 PCI Express Root Port 8 I OxAPIC Enable PAE set FEC0 0000h FFC7 FFFFh FF80 0000h FF87 FFFFh LPC or SPI or PCI Bit 8 in BIOS Decode Enable register...

Страница 44: ...sm D30 F0 64 KB anywhere in 4 GB range LPC LPC Generic Memory Range Enable using setting bit 0 of the LPC Generic Memory Range register D31 F0 offset 98h 32 Bytes anywhere in 64 bit address range SMBu...

Страница 45: ...009 00E DMA Controller 0F DMA Controller 010 018 DMA Controller 019 01E DMA Controller 020 021 Interrupt Controller 024 025 Interrupt Controller 028 029 Interrupt Controller 02C 02D Interrupt Controll...

Страница 46: ...r 0F0 FERR Interrupt Controller 170 177 SATA Controller PCI or PCIE 1F0 1F7 SATA Controller PCI or PCIE 200 207 Gameport Low 208 20F Gameport High 376 SATA Controller PCI or PCIE 3F6 SATA Controller P...

Страница 47: ...KB I O Space LPC Generic 4 Anywhere in 64 KB I O Space I O Trapping Ranges Anywhere in 64 KB I O Space PCI Bridge Anywhere in 64 KB I O Space KT 6 5 APIC Interrupt Mapping IRQ Typical Intterupt Resour...

Страница 48: ...on 00h 00h 00h Intel host Processor Bridge 00h 1Fh 00h LPC Controller 00h 1Fh 02h SATA Controller 1 00h 1Fh 03h SMBus Controller 00h 1Fh 05h SATA Controller 2 00h 1Dh 00h USB EHCI Controller 1 00h 1Ch...

Страница 49: ...ort 8 Int0 INTA 16 INTB 17 INTC 18 INTD 19 INTA 16 INTB 17 INTC 18 INTD 19 Int1 INTB 17 INTC 18 INTD 19 INTA 16 INTB 17 INTC 18 INTD 19 INTA 16 Int2 INTC 18 INTD 19 INTA 16 INTB 17 INTC 18 INTD 19 INT...

Страница 50: ...44 System Resources This page intentionally left blank...

Страница 51: ...formation Board Information System Date and Time Access Level Power Management System Management Thermal Management Watchdog Timer CSM Configuration Super IO Configuration Serial Console Redirection U...

Страница 52: ...requency Total Memory Info only Display Installed Memory Size 7 2 3 Main Board Information Feature Options Description Board Information Submenu Board Information Info only Serial Number Info only Dis...

Страница 53: ...Reason Info only The boot reason is the event which causes the reboot of the system 7 2 4 Main System Date Time Feature Options Description System Date Info only System Time Info only 7 2 5 Main Acces...

Страница 54: ...I OS In windows XP it will make OS show shutdown LID Function Disabled Enabled Enable Disable LID Function Lock Legacy Resource Disabled Enabled Enables or Disables Lock of Legacy Resources I21x Lan P...

Страница 55: ...Info Only 7 3 4 Advanced Thermal Management Feature Options Description Thermal Configuration Parameters Info Only Thermal and Fan Speed Submenu Smart Fan Submenu Critical Trip Point Disabled 65 C 75...

Страница 56: ...ect Trigger Temperature 7 3 5 Advanced Watchdog Timer Feature Options Description Watchdog Timer Info only Power Up Watchdog Disabled Enabled The Power Up Watchdog resets the system after a certain am...

Страница 57: ...5104D Info only Serial Port 1 Configuration Submenu Set Parameters of Serial Port 1 COMA Serial Port 2 Configuration Submenu Set Parameters of Serial Port 2 COMB Super IO Chip W83627DHG Info Only Seri...

Страница 58: ...ort 1 COMA Serial Port 1 Configuration Info only Serial Port Disableed Enabled Enable or Disable Serial Port COM Device Settings Info Only Display IO IRQ information of COM Port Change Settings Auto I...

Страница 59: ...bled Disabled Console Redirection Enable or Disable Console Redirection Settings Submenu The settings specify how the host computer and the remote computer which the user is using will exchange data B...

Страница 60: ...t allow for error detection They can be used as an additional data bit Stop Bits 1 2 Stop bits indicate the end of a serial data packet A start bit indicates the beginning The standard setting is 1 st...

Страница 61: ...n errors Even parity bit is 0 if the num of 1 s in the data bits is even Odd parity bit is 0 if num of 1 s in the data bits is odd Mark parity bit is always 1 Space Parity bit is always 0 Mark and Spa...

Страница 62: ...equire lower speeds Data Bits 7 8 Data Bits Parity None Even Odd Mark Space A parity bit can be sent with the data bits to detect some transmission errors Even parity bit is 0 if the num of 1 s in the...

Страница 63: ...UTF8 Uses UTF8 encoding to map Unicode chars onto 1 or more bytes Bits per second 9600 19200 38400 57600 115200 Selects serial port transmission speed The speed must be matched on the other side Long...

Страница 64: ...Console Redirection Legacy Console Redirection Settings Feature Options Description Legacy Serial Redirection Port COM1 COM2 COM3 COM4 Select a COM port to display redirection of Legacy OS and Legacy...

Страница 65: ...isable UEFI Network Stack 7 3 11 Advanced Miscellaneous Feature Options Description Miscellanous Info Only Control the PCI Express Root Port Smart Battery Function Disable Enable Enable Disable Batter...

Страница 66: ...Storage Hierarchy Endorsement Hierarchy Disable Enable Enable or Disable Endorsement Hierarchy TPM2 0 UEFI Spec Version TCG_1_2 TCG_2 Select the TCG2 Spec Version Support TCG_1_2 the Compatible mode f...

Страница 67: ...le Enable Enable Hyper Threading Software Method to Enable Disable Logical Processor threads Execute Disable Bit Disable Enable When disabled forces the XD feature flag to always return 0 Enable Intel...

Страница 68: ...ONE Per Logical indicates the P state domain for each logical proc in the system Per Package all procs indicate the same domain in the same package P state coordination HW_ALL SW_ALL SW_ANY HW_ALL har...

Страница 69: ...ly Memory Frequency Auto 1333 1400 1600 1800 1867 2000 2133 2200 2400 2600 2667 2800 2933 3000 3200 Reserved Maximum Memory Frequency Selections in Mhz Do not select Reserved Memory Topology Submenu D...

Страница 70: ...D02F0 Port 2A Info only PCI E Port Auto Enable Disable In auto mode the BIOS will remove the EXP port if there is no device or errors on that device and the device is not HP capable Disable is used to...

Страница 71: ...ted Gen3 Eq Mode Auto Enable Phase 0 1 2 3 Disable Phase 0 1 2 3 Enable Phase 1 Only Enable Phase 0 1 Only Advanced Enable MMM Offset West Alt Short Channel PCIe Gen3 Adaptive Equalization Mode Gen3 S...

Страница 72: ...that the no training occurs but the CFG space is still active Link Speed Auto Gen1 2 5 GT s Gen2 5 GT s Gen3 8 GT s Override Max Link Wid Auto x1 x2 x4 x8 x16 Override the max link width that was set...

Страница 73: ...Gen3 DN Tx Present Auto P0 6 0 0 0 dB P1 3 5 0 0 dB P2 4 5 0 0 dB P3 2 5 0 0 dB P4 0 0 0 0 dB P5 0 0 2 0 dB P6 0 0 2 5 dB P7 6 0 3 5 dB P8 3 5 3 5 dB P9 0 0 3 5 dB PCIe Gen3 Downstream Tx Present Gen...

Страница 74: ...mphasis control LNKCON2 6 for this PCIe port PCI E Port Link Status Info only PCI E Port Link Max Info only PCI E Port Link Speed Info only PCI E ASPM Support Auto Disable L1 Only This option enables...

Страница 75: ...reset Auto P0 6 0 0 0 dB P1 3 5 0 0 dB P2 4 5 0 0 dB P3 2 5 0 0 dB P4 0 0 0 0 dB P5 0 0 2 0 dB P6 0 0 2 5 dB P7 6 0 3 5 dB P8 3 5 3 5 dB P9 0 0 3 5 dB PCIe Gen3 Upstream Tx Preset Hide Port no yes Use...

Страница 76: ...on settings PCH SATA Configuration Submenu SATA devices and settings USB Configuration Submenu USB Configuration Settings Networking Submenu Network devices and setings 7 4 5 1 Chipset PCH Configurati...

Страница 77: ...t 2 Submenu PCI Express Root Port 3 Submenu PCI Express Root Port 4 Submenu PCI Express Root Port 5 Submenu PCI Express Root Port 6 Submenu PCI Express Root Port 7 Submenu PCI Express Root Port 8 Subm...

Страница 78: ...16K 20K Range for this Root Bridge 7 4 5 3 Chipset PCH Configuration PCH SATA Configuration Feature Options Description PCH SATA Configuration Info only Configure SATA as IDE AHCI Identify the SATA po...

Страница 79: ...Auto Auto Enabled Disabled Manual Mode of operation of xHCI controller Trunk Clock Gating BTCG Enabled Disabled Enable Disable BTCG USB Ports Per Port Disable Control Disabled Enabled Control each of...

Страница 80: ...nu Customizable Secure Boot settings System Mode Info only Secure Boot Info only Vender Keys Info only Attempt Secure Boot Disabled Enabled Secure Boot activated when Platform Key PK is enrolled Syste...

Страница 81: ...ped to reduce time cost during boot New Boot Option Policy Default Place First Place Last Controls the placement of newly detected UEFI boot option 7 6 1 Boot FIXED BOOT ORDER Priorities Feature Optio...

Страница 82: ...Save Change and Reset Reset the system after saving the changes Discard Changes and Reset Reset system setup without saving any changes Save Options Info only Save Changes Save Changes done so far to...

Страница 83: ...by the Intel Platform Innovation Framework for EFI the Framework The Framework refers the following boot phases which may apply to various status code checkpoint descriptions Security SEC initial low...

Страница 84: ...overy errors PEI 8 2 Standard Status Codes 8 2 1 SEC Phase Status Code Description 0x00 Not used Progress Codes 0x01 Power on Reset type detection soft hard 0x02 AP initialization before microcode loa...

Страница 85: ...h Bridge initialization North Bridge module specific 0x19 Pre memory South Bridge initialization is started 0x1A Pre memory South Bridge initialization South Bridge module specific 0x1B Pre memory Sou...

Страница 86: ...ge module specific 0x3F 0x4E OEM post memory initialization codes 0x4F DXE IPL is started PEI Error Codes 0x50 Memory initialization error Invalid memory type or incompatible memory speed 0x51 Memory...

Страница 87: ...ocess started 0xF3 Recovery firmware image is found 0xF4 Recovery firmware image is loaded 0xF5 0xF7 Reserved for future AMI progress codes Recovery Error Codes 0xF8 Recovery PPI is not available 0xF9...

Страница 88: ...ecific 0x6E North Bridge DXE initialization North Bridge module specific 0x6F North Bridge DXE initialization North Bridge module specific 0x70 South Bridge DXE initialization is started 0x71 South Br...

Страница 89: ...xA3 IDE Enable 0xA4 SCSI initialization is started 0xA5 SCSI Reset 0xA6 SCSI Detect 0xA7 SCSI Enable 0xA8 Setup Verifying Password 0xA9 Start of Setup 0xAA Reserved for ASL see ASL Status Codes sectio...

Страница 90: ...rror loading Boot Option LoadImage returned error 0xDA Boot Option is failed StartImage returned error 0xDB Flash update is failed 0xDC Reset protocol is not available 8 2 6 DXE Beep Codes of Beeps De...

Страница 91: ...ansitioned into ACPI mode Interrupt controller is in PIC mode 0xAA System has transitioned into ACPI mode Interrupt controller is in APIC mode 8 3 OEM Reserved Checkpoint Ranges Status Code Descriptio...

Страница 92: ...86 BIOS Checkpoints Beep Codes This page intentionally left blank...

Страница 93: ...to board connector with 0 5mm for a stacking height of 5 mm This connector can be used with 5 mm through hole standoffs SMT type Tyco 3 6318491 6 Foxconn QT002206 4141 3H 220 pin board to board connec...

Страница 94: ...9 2 2 Heat Sinks A heat sink can be used as a thermal solution for a specific COM Express module and can have a fan or be fanless depending on the thermal requirements 9 2 3 Installation Install a he...

Страница 95: ...module Step 5 Place the COM Express module and heatsink assembly onto the connectors on the carrier board as shown Then press down on the module until it is firmly seated on the carrier board Step 6 U...

Страница 96: ...90 Mechanical Information Step 7 If you are installing a heatsink with a fan plug the fan connector into the carrier board as shown...

Страница 97: ...he choice of 5 mm or 8mm board to board connectors there is the choice of Top and Bottom mounting In Top mounting the threaded standoffs are on the carrier board and the thermal solution is equipped w...

Страница 98: ...ffs are DIP type and through hole standoffs are SMT type Other types not listed are available upon request 5mm through hole standoff SMT type P N 33 72000 0050 5mm threaded standoff DIP type P N 33 72...

Страница 99: ...les To avoid electrical shock and or damage to equipment Keep equipment away from water or liquid sources Keep equipment away from high heat or high humidity Keep equipment properly ventilated do not...

Страница 100: ...00 Toll Free 1 800 966 5200 USA only Fax 1 408 600 1189 Email info adlinktech com ADLINK Technology China Co Ltd Address 300 Fang Chun Rd Zhangjiang Hi Tech Park Pudong New Area Shanghai 201203 China...

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