Actel Core1553, Руководство пользователя, Страница: 24 / 38

Core1553BRM Demonstration Design
2 4
– 02 indicates the remote terminal address is set to 2. If the display shows other than 1L02,
check the DIP switch settings.
Interrupt status messages will begin scrolling across the terminal window:
2.80E4.0400.4A00
1.0018.0002
2.8008.0400.4A00
2.8004.0400.1200
2.80E4.0400.4A00
1.0018.0002
2.8008.0400.4A00
2.8004.0400.2200
2.80E4.0400.4A00
1.0018.0002
2.8008.0400.4A00
2.8004.0400.3200
:
Monitoring 1553B Message Traffic Using Silicon Explorer II
At this point, the demonstration design will begin passing 1553B messages between the two
Core1553BRM cores. You can monitor the message traffic using Silicon Explorer II or any logic
analyzer. The next section will describes monitoring 1553B message using Silicon Explorer II, but
you can follow the similar steps when using the logic analyzer.
To monitor message traffic:
1. If you do not have the latest version of Silicon Explorer, download the software from the
Actel website ( www.actel.com/download/program_debug/se/default.aspx ) and install it.
2. Connect Silicon Explorer II to your PC using a serial cable.
3. Connect the 22-pin cable supplied with Silicon Explorer II (for 18 channels, a clock, V
CC
, GND,
and clock GND) to the Silicon Explorer II hardware, and connect the first 4 channels to the
pins in the J5 connector (
Table 2-3 and Figure 2-11 ).
Table 2-3 • Silicon Explorer II Connections to M1AFS-ADV-DEV-KIT
Silicon Explorer II Lead M1AFS-ADV-DEV-KIT Board Signal
CH0 Pin 1 (top) on J5 Bus A
CH1 Pin 3 on J5 Bus B
CH2 Pin 5 on J5 MSGINT
GND Pin 7 on J5 GND