A
A
B
B
C
C
D
D
E
E
1
1
2
2
3
3
4
4
4mil width and place
within 500mil of the PCH
Can be left NC
when IAMT is not
support on the
platfrom
*
not support AMT APWROK can mux
with PWROK (check list1.5 P.47)
L
：
：
：
：
Disable
Must always PU at +RTCVCC
DSWODVREN - On Die DSW VR Enable
H
：
：
：
：
Enable internal DSW +1.05VS
ALL power OK
tell PCH all power ok
but cpu core
not support
Deep S4,S5 can NC
PCH EDS1.5 P.75
not support Deep S4,S5
can be left unconnected.
Check list1.5 P.81
not support Deep S4,S5 DPWROK mux with
RSMRST#
check list1.5 P.50
No use PU 10K +3VS
No use PU 10K +3VALW
No use PU 10K +3VALW
Ring Indicator CRB1.0 PU 10K +3VALW
Follow Tacoma 1.0
L=500mil S=15mil
1/11 Add "ACPRESENT" signal. (follow Q5LJ1)
DMI_IRCOMP
DMI_CRX_PTX_N1
DMI_CRX_PTX_P0
DMI_CRX_PTX_P3
DMI_CTX_PRX_P0
DMI_CRX_PTX_N2
DMI_CRX_PTX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
DMI_CTX_PRX_P3
DMI_CRX_PTX_P2
DMI_CTX_PRX_N1
DMI_CRX_PTX_N0
DMI_CTX_PRX_N0
DMI_CTX_PRX_P1
DMI_CRX_PTX_N3
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC1
FDI_LSYNC0
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_CTX_PRX_P5
PCH_GPIO72
RI#
SUSACK#_R
DMI2RBIAS
SUSWARN#_R
PM_DRAM_PWRGD
PCH_RSMRST#
PBTN_OUT#
PCH_ACIN
DSWODVREN
PCH_PCIE_WAKE#
SUS_STAT#
H_PM_SYNC
SUSCLK
PCH_GPIO29
XDP_DBRESET#_R
PCH_PCIE_WAKE#
DSWODVREN
CLKRUN#
CLKRUN#
SYS_PWROK
PCH_PWROK
PCH_GPIO29
SYS_PWROK
SUSACK#
PCH_PWROK_R
PM_DRAM_PWRGD
PCH_RSMRST#
PCH_GPIO72
SUSWARN#_R
RI#
SLP_A#
SLP_SUS#
PCH_DPWROK
PCH_ACIN
PCH_RSMRST#
PM_SLP_S5#
PM_SLP_S4#
PM_SLP_S3#
PCH_ACIN
SUS_PWR_DN_ACK
SUSACK#_R
+1.05VS_VTT
+RTCVCC
+3VS
+3VS
+3VALW_PCH
+VCCSUS3_3
+VCCSUS3_3
DMI_CTX_PRX_N0
<4>
DMI_CTX_PRX_N1
<4>
DMI_CTX_PRX_N2
<4>
DMI_CTX_PRX_N3
<4>
DMI_CTX_PRX_P0
<4>
DMI_CTX_PRX_P1
<4>
DMI_CTX_PRX_P2
<4>
DMI_CTX_PRX_P3
<4>
SUSACK#
<29>
XDP_DBRESET#
<5>
PCH_RSMRST#
<29>
PBTN_OUT#
<29>
ACIN
<29,33,36>
PCH_PWROK
<29>
VGATE
<41>
PM_DRAM_PWRGD
<5>
DMI_CRX_PTX_N0
<4>
DMI_CRX_PTX_N1
<4>
DMI_CRX_PTX_N2
<4>
DMI_CRX_PTX_N3
<4>
DMI_CRX_PTX_P0
<4>
DMI_CRX_PTX_P1
<4>
DMI_CRX_PTX_P2
<4>
DMI_CRX_PTX_P3
<4>
FDI_CTX_PRX_N0
<4>
FDI_CTX_PRX_N1
<4>
FDI_CTX_PRX_N2
<4>
FDI_CTX_PRX_N3
<4>
FDI_CTX_PRX_N4
<4>
FDI_CTX_PRX_N5
<4>
FDI_CTX_PRX_N6
<4>
FDI_CTX_PRX_N7
<4>
FDI_CTX_PRX_P0
<4>
FDI_CTX_PRX_P1
<4>
FDI_CTX_PRX_P2
<4>
FDI_CTX_PRX_P3
<4>
FDI_CTX_PRX_P4
<4>
FDI_CTX_PRX_P5
<4>
FDI_CTX_PRX_P6
<4>
FDI_CTX_PRX_P7
<4>
FDI_INT
<4>
FDI_FSYNC0
<4>
FDI_FSYNC1
<4>
FDI_LSYNC0
<4>
FDI_LSYNC1
<4>
PCH_DPWROK
<29>
PCH_PCIE_WAKE#
<25,27>
SUSCLK
<29>
PM_SLP_S5#
<29>
PM_SLP_S4#
<29>
PM_SLP_S3#
<29>
SLP_SUS#
<29>
H_PM_SYNC
<5>
SYS_PWROK
<5>
ACPRESENT
<29>
CLKRUN#
<30>
SUSWARN#
<29>
SUS_PWR_DN_ACK
<29>
Title
Size
Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0
PCH (3/9) DMI,FDI,PM
Custom
15
45
Friday, April 20, 2012
2011/11/22
2012/11/22
Compal Electronics, Inc.
Q1VZC M/B LA-8941P Schematic
Title
Size
Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0
PCH (3/9) DMI,FDI,PM
Custom
15
45
Friday, April 20, 2012
2011/11/22
2012/11/22
Compal Electronics, Inc.
Q1VZC M/B LA-8941P Schematic
Title
Size
Document Number
Rev
Date:
Sheet
of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
1.0
PCH (3/9) DMI,FDI,PM
Custom
15
45
Friday, April 20, 2012
2011/11/22
2012/11/22
Compal Electronics, Inc.
Q1VZC M/B LA-8941P Schematic
DMI
FDI
System Power Management
U16C
COUGARPOINT_FCBGA989
HM77@
DMI0RXN
BC24
DMI1RXN
BE20
DMI2RXN
BG18
DMI3RXN
BG20
DMI0RXP
BE24
DMI1RXP
BC20
DMI2RXP
BJ18
DMI3RXP
BJ20
DMI0TXN
AW24
DMI1TXN
AW20
DMI2TXN
BB18
DMI3TXN
AV18
DMI0TXP
AY24
DMI1TXP
AY20
DMI2TXP
AY18
DMI3TXP
AU18
DMI_ZCOMP
BJ24
DMI_IRCOMP
BG25
FDI_RXN0
BJ14
FDI_RXN1
AY14
FDI_RXN2
BE14
FDI_RXN3
BH13
FDI_RXN4
BC12
FDI_RXN5
BJ12
FDI_RXN6
BG10
FDI_RXN7
BG9
FDI_RXP0
BG14
FDI_RXP1
BB14
FDI_RXP2
BF14
FDI_RXP3
BG13
FDI_RXP4
BE12
FDI_RXP5
BG12
FDI_RXP6
BJ10
FDI_RXP7
BH9
FDI_FSYNC0
AV12
FDI_FSYNC1
BC10
FDI_LSYNC0
AV14
FDI_LSYNC1
BB10
FDI_INT
AW16
PMSYNCH
AP14
SLP_SUS#
G16
SLP_S3#
F4
SLP_S4#
H4
SLP_S5# / GPIO63
D10
SYS_RESET#
K3
SYS_PWROK
P12
PWRBTN#
E20
RI#
A10
WAKE#
B9
SUS_STAT# / GPIO61
G8
SUSCLK / GPIO62
N14
ACPRESENT / GPIO31
H20
BATLOW# / GPIO72
E10
PWROK
L22
CLKRUN# / GPIO32
N3
SUSWARN# / SUS_PWR_DN_ACK / GPIO30
K16
RSMRST#
C21
DRAMPWROK
B13
SLP_LAN# / GPIO29
K14
APWROK
L10
DPWROK
E22
DMI2RBIAS
BH21
SLP_A#
G10
DSWVRMEN
A18
SUSACK#
C12
R167
10K_0402_5%
1
2
R166
0_0402_5%
1
2
T34
PAD
@
C178
0.047U_0402_16V7K
@
1
2
R153
10K_0402_5%
1
2
R157
200_0402_5%
1
2
T15
PAD
@
T16
PAD
@
R151
10K_0402_5%
1
2
R152
330K_0402_5%
@
1
2
R156
10K_0402_5%
1
2
R196
0_0402_5%
DS3@
1
2
R150
330K_0402_5%
1
2
R159
10K_0402_5%
1
2
R161
750_0402_1%
1
2
R483
0_0402_5%
S3@
1
2
R158
10K_0402_5%
@
1
2
D2
RB751V-40_SOD323-2
@
1
2
R179
0_0402_5%
S3@
1
2
R178
0_0402_5%
S3@
1
2
R155
10K_0402_5%
1
2
R162
8.2K_0402_5%
1
2
R482
0_0402_5%
DS3@
1
2
T36
PAD
@
U19
MC74VHC1G08DFT2G_SC70-5
B
2
A
1
Y
4
P
5
G
3
R165
100K_0402_5%
@
1
2
R154
10K_0402_5%
1
2
R177
0_0402_5%
1
2
R168
10K_0402_5%
1
2
R163
0_0402_5%
DS3@
1
2
T35
PAD
@
R160
49.9_0402_1%
1
2
R164
0_0402_5%
1
2
