background image

 

M0-M2:  

These bits set the operational mode of the selected counter.  

 

Mode

M2

M1

M0

 

0 0 

1 0 

2 X 

3 X 

4 1 

5 1 

  
 

BCD: 

Set the selected counter to count in binary (BCD = 0) or BCD (BCD = 1). 

 

Reading and Loading the Counters

  
If you attempt to read the counters on the fly when there is a high input frequency, you will most likely 
get erroneous data. This is partly caused by carries rippling through the counter during the read 
operation. Also, the low and high bytes are read sequentially rather than simultaneously and, thus, it is 
possible that carries will be propagated from the low to the high byte during the read cycle. 
  
To circumvent these problems, you can perform a counter-latch operation in advance of the read cycle. 
To do this, load the RW1 and RW2 bits with zeroes. This instantly latches the count of the selected 
counter (selected via the SC1 and SC0 bits) in a 16-bit hold register. (An alternative method of latching 
counter(s) that has an additional advantage of operating simultaneously on several counters is through 
a readback command to be discussed later.) A subsequent read operation on the selected counter 
returns the held value. Latching is the best way to read a counter on the fly without disturbing the 
counting process. You can only rely on directly read counter data if the counting process is suspended 
while reading by bringing the gate low. 
  
For each counter you must specify in advance the type of read or write operation that you intend to 
perform. You have a choice of loading/reading (a) the high byte of the count, or (b) the low byte of the 
count, or (c) the low byte followed by the high byte. This last is most generally used and is selected for 
each counter by setting the RW1 and RW0 bits to ones. Subsequent read/load operations must be 
performed in pairs in this sequence or the sequencing flip-flop in the 8254 chip will get out of step. The 
readback command byte format is:  

 

B7 B6  B5  B4  B3  B2  B1 B0 

1 1 CNT 

STA 

C2 

C1 

C0 

  
 

CNT: 

 When 0, latches the counters selected by bits C0-C2. 

 

STA: 

When 0, returns the status byte of counters selected by C0-C2. 

 

C0, C1, C2: 

When high, select a particular counter for readback. C0 selects Counter 0, C1 
selects Counter 1, and C2 selects Counter 2. 

  
You can perform two types of operations with the readback command. When CNT=0, the counters 
selected by C2 through C0 are latched simultaneously. When STA=0, the counter status byte is read 
when the counter I/O location is accessed. The counter status byte provides information about the 
current output state of the selected counter and its configuration. 
  

Manual 104-DIO-48E, 24E 

23

Содержание 104-DIO-24E

Страница 1: ...service in house repair center WE BUY USED EQUIPMENT Sell your excess underutilized and idle used equipment We also offer credit for buy backs and trade ins www artisantg com WeBuyEquipment REMOTE IN...

Страница 2: ...10623 Roselle Street San Diego CA 92121 y 858 550 9559 y Fax 858 550 7322 contactus accesio com y www accesio com MODEL 104 DIO 48E and 104 DIO 24E USER MANUAL FILE M104 DIO 48E A1n...

Страница 3: ...s IBM PC PC XT and PC AT are registered trademarks of the International Business Machines Corporation Printed in USA Copyright 2001 2005 by ACCES I O Products Inc 10623 Roselle Street San Diego CA 921...

Страница 4: ...warranty Warranty commences with equipment shipment Following Years Throughout your equipment s lifetime ACCES stands ready to provide on site or in plant service at reasonable rates similar to those...

Страница 5: ...ng Your Application Software 15 Table 5 1 Address Selection Table 15 Digital I O 16 Table 5 2 Control Register Bit Assignment 16 Programming Example Basic 18 Enabling Disabling I O Buffers 18 Counter...

Страница 6: ...Peripheral Interface PPI chips of type 82C55 to provide a computer interface to 48 I O lines There are three 8 bit ports A B and C per PPI Each 8 bit port can be configured by software to function as...

Страница 7: ...board optionally has an 82C54 Counter Timer chip This can be used for frequency measurement frequency output pulse width modulation pulse width measurement event count etc SPECIAL NOTE FOR PROGRAMMERS...

Страница 8: ...SELECT INTERRUPT ENABLE PPI GROUP 1 PPI GROUP 0 DI O INTERRUPT COMPUTER I O BUS I O B U F F E R S C O N N E C T O R C O N N E C T O R PORT A PORT B PORT C HI PORT C LO PORT A PORT B PORT C HI PORT C L...

Страница 9: ...n The following instructions assume the CD ROM drive is drive D Please substitute the appropriate drive letter for your system as necessary DOS 1 Place the CD into your CD ROM drive 2 Type B to change...

Страница 10: ...ess according to your application requirements as mentioned above 2 Remove power from the PC 104 stack 3 Assemble standoff hardware for stacking and securing the boards 4 Carefully plug the board onto...

Страница 11: ...upts are enabled by writing any value to base address Bh and disabled by reading from that address Once an interrupt has occured it must be cleared by writing any value to base address Fh for the next...

Страница 12: ...A4 A5 A6 A7 A8 IRQ 12 IRQ 4 IRQ 5 IRQ 7 IRQ 10 IRQ 11 P1 P4 P3 IRQ 3 A9 Pin 1 Pin 1 Pin 1 IEN1 IEN0 INP1 INP0 TST BEN Figure 3 1 Option Selection Map Manual 104 DIO 48E 24E 11...

Страница 13: ...A 2C0 2CF EGA 2D0 2DF EGA 2E0 2E7 GPIB AT 2E8 2EF Serial Port 2F8 2FF Serial Port 300 30F Prototype Board 310 31F Prototype Board 320 32F Hard Disk XT 370 377 Floppy Controller 2 378 37F Parallel Prin...

Страница 14: ...300h 30Fh On 2F0h 2FFh On On 2E0h 2EFh On On 2D0h 2DFh On On On 2C0h 2CFh On On 2B0h 2BFh On On On 2A0h 2AFh On On On 290h 29Fh On On On On 280h 28Fh On On 270h 27Fh On On On 260h 26Fh On On On 250h 2...

Страница 15: ...evious page before selecting the board address If the addresses of two circuits overlap you will experience unpredictable computer behavior Note that address ranges 100h 10Fh through 1F0h 1FFh can be...

Страница 16: ...ister Operation Counter Timer Disabled Counter Timer Enabled Base Address PA Group 0 Counter Timer 0 Read Write Base Address 1 PB Group 0 Counter Timer 1 Read Write Base Address 2 PC Group 0 Counter T...

Страница 17: ...put 0 Output D2 Mode Select 1 Mode 1 0 Mode 0 D3 Port C Hi C4 C7 1 Input 0 Output D4 Port A 1 Input 0 Output D5 D6 Mode Select 00 Mode 0 01 Mode 1 1X Mode 2 D7 Mode Set Flag 1 Active Table 5 2 Control...

Страница 18: ...t be the same for the two control bytes Those buffers will now remain enabled until another control byte with data bit D7 high is sent to base address 3 The buffers for all ports of the group can be t...

Страница 19: ...0 X INP BASEADDR Read Port A 40 Y INP BASEADDR 2 16 Read Port C Hi To set outputs high 1 at Port B and the lower nybble of Port C 50 OUT BASEADDR 1 HFF Turn on all Port B bits 60 OUT BASEADDR 2 HF Tur...

Страница 20: ...the mode you must first set the new mode and then enable the buffers Enabling the buffers can be done at either Base Address 3 or 7 or Base Address 8 or 9 Counter Timer The board uses an 8254 counter...

Страница 21: ...o indicate that it asserted the interrupt but is otherwise capable of sharing the IRQ In this case it may share the interrupt level with other boards if a it is the only board on that IRQ level that d...

Страница 22: ...Count After the counter is loaded the output is set low and will remain low until the counter decrements to zero The output then goes high and remains high until a new count is loaded into the counte...

Страница 23: ...gger Programming the 8254 The counters are programmed by writing a control byte into the counter control register The control byte specifies the counter to be programmed the counter mode the type of r...

Страница 24: ...ter on the fly without disturbing the counting process You can only rely on directly read counter data if the counting process is suspended while reading by bringing the gate low For each counter you...

Страница 25: ...s in BCD mode If both STA and CNT bits in the readback command byte are set low and the RW1 and RW0 bits have both been previously set high in the counter control register thus selecting two byte read...

Страница 26: ...is limited by the input speed of the 8254 counter and slow signals are preferred Further only 65 535 events are possible without a RESET The function returns the number of events based on priority or...

Страница 27: ...ut PPI 0 write any value to Base Address Dh To map out the counter timer and map in PPI 0 read from Base Address Dh This mapping does not reset either chip in any way so you can for example map in the...

Страница 28: ...ery second line is grounded to minimize crosstalk between signals Table 7 1 Digital I O P3 and P4 Connector Pin Assignments Assignment Pin Assignment Pin PC7 1 2 PC6 3 4 PC5 5 6 Port C Hi PC4 7 8 PC3...

Страница 29: ...nector Pin Assignments Assignment Pin Ground 1 Ground 2 1MHz Clock output 3 Ground 4 Clock 0 a k a CLOCK IN events input 5 Ground 6 Gate 1 a k a GATE IN input 7 Ground 8 Output 2 a k a CLOCK OUT 9 Gro...

Страница 30: ...ve us some feedback please email us at manuals accesio com Please detail any errors you find and include your mailing address so that we can send you any manual updates 10623 Roselle Street San Diego...

Страница 31: ...service in house repair center WE BUY USED EQUIPMENT Sell your excess underutilized and idle used equipment We also offer credit for buy backs and trade ins www artisantg com WeBuyEquipment REMOTE IN...

Отзывы: