Chapter 6: 8254 Counter/Timer
These boards optionally contain one type 82C54 programmable counter/timer. This is hard wired on the
board to allow you to implement a 16-bit Event Counter or 32-bit Rate Generator (Frequency Output)
functions. See the block diagram.
The 82C54 is a flexible and powerful device that consists of three independent 16-bit down counters.
Each counter can be programmed to any count as low as 1 or 2 (depending on the mode chosen) and
up to 65,535. For those interested in more detailed information, a full description can be found in the
Intel (or equivalent manufacturer's) data sheet in the Chip Docs section on the CD.
To save I/O space, the digital I/O registers overlay the Counter/Timer register space. To access these
registers, write any value to base a Dh. After the Counter/Timer is programmed, read from the
same address to regain access to the digital I/O circuit.
Operational Modes
The 8254 modes of operation are described in the following paragraphs to familiarize you with the
versatility and power of this device. For those interested in more detailed information, a full description
of the 8254 programmable interval timer can be found in the Intel (or equivalent manufacturers') data
sheets. The following conventions apply for use in describing operation of the 8254 :
Clock:
A positive pulse into the counter's clock input
Trigger:
A rising edge input to the counter's gate input
Counter Loading:
Programming a binary count into the counter
Mode 0: Pulse on Terminal Count
After the counter is loaded, the output is set low and will remain low until the counter decrements to
zero. The output then goes high and remains high until a new count is loaded into the counter. A trigger
enables the counter to start decrementing.
Mode 1: Retriggerable One-Shot
The output goes low on the clock pulse following a trigger to begin the one-shot pulse and goes high
when the counter reaches zero. Additional triggers result in reloading the count and starting the cycle
over. If a trigger occurs before the counter decrements to zero, a new count is loaded. This forms a
retriggerable one-shot. In mode 1, a low output pulse is provided with a period equal to the counter
count-down time.
Mode 2: Rate Generator
This mode provides a divide-by-N capability where N is the count loaded into the counter. When
triggered, the counter output goes low for one clock period after N counts, reloads the initial count, and
the cycle starts over. This mode is periodic, the same sequence is repeated indefinitely until the gate
input is brought low. This mode also works well as an alternative to mode 0 for event counting.
Mode 3: Square Wave Generator
This mode operates like mode 2. The output is high for half of the count and low for the other half. If the
count is even, then the output is a symmetrical square wave. If the count is odd, then the output is high
for (N+1)/2 counts and low for (N-1)/2 counts. Periodic triggering or frequency synthesis are two
possible applications for this mode. Note that in this mode, to achieve the square wave, the counter
decrements by two for the total loaded count, then reloads and decrements by two for the second part
of the wave form.
Manual 104-DIO-48E, 24E
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