Manual PCI-DA12-2/4/6
17
The Digital I/O Control Byte sets the directions of Port A and Port B.
Port B Input
Port B Output
Port A Input
92h
90h
Port A Output
82h
80h
Table 5-3:
Digital I/O Control Byte Values
BIT
D7 D6 D5 D4 D3
D2
D1 D0
Low Byte
B7 B6 B5 B4 B3
B2
B1 B0
High Byte
x
x
x
x
B11
B10 B9 B8
Table 5-4:
DAC Data Format
For Unipolar ranges: For Unipolar ranges, data are in true binary form.
XXXX 0000 0000 0000 = Zero
XXXX 1000 0000 0000 = ½ Scale
XXXX 1111 1111 1111 = Full Scale
|
|
MSB or B11
B0 or LSB
For Bipolar ranges: For Bipolar ranges, data are in offset binary form.
XXXX 0000 0000 0000 = -Full Scale
XXXX 1000 0000 0000 = Zero
XXXX 1111 1111 1111 = +Full Scale
|
|
MSB or B11
B0 or LSB
Note
PPI Mode 1 cannot be used with this circuit without modification. Thus, bits D2, D5, and D6 should
always be set to "0". If your card has been modified to operate in Mode 1, then there is an Addendum
sheet in the front of this manual describing that modification. This circuit cannot be modified to operate in
PPI Mode.
The circuit is initialized by the computer Reset command (all ports set for input and all buffers enabled).
Both the 8255 control register and the buffer direction latch are accessed at the same address.
The 8255 control register will latch a new configuration byte when it's written to with bit D7 high. If, for
example, hex 80 is sent to Base 23, the group 0 PPI will be configured in mode 0 with ports A,
B, and C as outputs.
At the same time, data bit D7 is also latched in the buffer controller. A high state puts the buffers in the
tristate mode; i.e., disabled. Now, if any of the ports are to be set as outputs, you may set the values of
the respective port with the outputs still in tristate condition. Lastly, to enable the ports a control byte with
bit D7 low must be sent to Base 23.
Note
All data bits except D7 must be the same for the two control bytes. Those buffers will now remain enabled
until another control byte with data bit D7 high is sent to Base 23.
