bdi
GDB
for GNU Debugger, BDI2000 (ARM)
User Manual
10
© Copyright 1997-2005 by ABATRON AG Switzerland
V 1.17
BDI TARGET B Connector Signals:
Pin
Name
Describtion
1
TDO
JTAG Test Data Out
This input to the BDI2000 connects to the target TDO line.
2
reserved
3
TDI
JTAG Test Data In
This output of the BDI2000 connects to the target TDI line.
4
reserved
5
RTCK
Returned JTAG Test Clock
This input to the BDI2000 connects to the target RTCK line.
6
Vcc Target
1.8 – 5.0V:
This is the target reference voltage. It indicates that the target has power and it is also used
to create the logic-level reference for the input comparators. It also controls the output logic
levels to the target. It is normally fed from Vdd I/O on the target board.
3.0 – 5.0V with Rev. A/B :
This input to the BDI2000 is used to detect if the target is powered up. If there is a current
limiting resistor between this pin and the target Vdd, it should be 100 Ohm or less.
7
TCK
JTAG Test Clock
This output of the BDI2000 connects to the target TCK line.
8
TRST
JTAG Test Reset
This open-drain / push-pull output of the BDI2000 resets the JTAG TAP controller on the
target. Default driver type is open-drain.
9
TMS
JTAG Test Mode Select
This output of the BDI2000 connects to the target TMS line.
10
reserved
11
reserved
12
GROUND
System Ground
13
RESET
System Reset
This open-drain output of the BDI2000 is used to reset the target system.
14
reseved
15
reseved
16
GROUND
System Ground
