73
MISCSET Register 1
Index: 1
Data Port Description
MISCSET 1
RES
ROM
CC
V48K
VGADIS VGARS
RES
RES
PWR
x
0
0
0
0
0
x
x
r
r/w
r/w
r/w
r/w
r/w
x
x
D7
D6
D5
D4
D3
D2
D1
D0
Index: 2
Data Port Description
WDTRIG
x
x
x
x
x
x
x
x
PWR
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
D7
D6
D5
D4
D3
D2
D1
D0
Bit
Name
Function
7
RES
(reserved)
6
ROM
Disable VGA-ROM at address C0000h
0 = VGA-ROM on
1 = VGA-ROM off
5
CC
Disable VGA-ROM at address C0000h
0 = VGA-ROM on
1 = VGA-ROM off
4
V48K
Select VGA-ROM size
0 = 48 kB
1 = 32 kB
3
VGADIS
Disable on-board VGA controller
0 = WD90C24A on
1 = WD90C24A off
2
VGARIS
Disable on-board VGA controller
0 = WD90C24A on
1 = WD90C24A off
1 - 0
RES
(reserved)
The watchdog timer is reset by a write operation to this register.
Watchdog Retrigger
Содержание PCM-4330
Страница 1: ...PCM 4330 PC 104 486 CPU Module with Flat Panel CRT Interface ...
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Страница 126: ...126 PC 104 Module CPU Card PC 104 Mounting Support Female Male PC 104 Module Mounting Diagram ...
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