Document number
205065
Version
Rev. N
Issue date
2019-02-04
Sirius OBC and TCM User Manual
Page
94
of
174
5.11. NVRAM
The NVRAM on the OBC and TCM is a 262,144-bit magnetoresistive random access
memory (MRAM) device organized as 32,768 bytes of 8 bits. EDAC is implemented on a
byte basis meaning that half the address space is filled with checksums for correction. It’s a
strong correction which corrects 1 or 2 bit errors on a byte and detects multiple. The table
below presents the address space defined as words (
16,384
bytes can be used). The
address space is divided into two sub groups as product- and user address space.
5.11.1. Description
This driver software for the SPI RAM IP, handles the initialization, configuration and access
of the NVRAM.
The SPI RAM is divided into an in-
flight protected “safe” area and an in
-flight programmable
“update” area.
The in-flight protected area must be unlocked by physically connecting the debugger unit
before writing.
5.11.2. EDAC mode
When in EDAC mode, which is the normal mode of operation, all write and read transactions
are protected by EDAC algorithms. All NVRAM addresses containing EDAC are hidden by
the IP. The address space is given by the table below:
Area
Range start
Range end
Safe
0x0000
0x0FFF
Update
0x1000
0x3FFF
5.11.3. Non-EDAC mode
Non-EDAC mode is a debug mode that allows the user to examine the EDAC bytes.
The purpose of this mode is to be able to insert errors into the memory for testing of the
EDAC algorithm.
When in Non-EDAC mode net data and EDAC data is interleaved on an 8 bit basis.
I.e. when reading a 32 bit word byte, 0, 2 contains the net data and byte 1, 3 contains EDAC
data. The address space is doubled when compared to EDAC mode, as is shown with the
table below:
Area
Range start
Range end
Safe
0x0000
0x1FFF
Update
0x2000
0x7FFF
5.11.4. RTEMS API
This API represents the driver interface of the module from an RTEMS user application's
perspective.
The driver functionality is accessed through the RTEMS POSIX API for ease of usage. In
case of a failure on a function call, the
errno
value is set for determining the cause.
5.11.4.1. Enum rtems_spi_ram_edac_e
Enumerator for the error correction and detection of the SPI RAM.