Pericom PI3USB102 User Manual Download | Manualshive

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Pericom Semiconductor Corp.

www.pericom.com

Page 1 of 19

11/5/2013

AN

05/05/04

PI3USB102

PI3USB102 Demo Board Rev.A User Manual

Introduction

This user manual describes the components and operation of the PI3USB102 Demo Board. USB2.0 high-speed, full-
speed and low speed signal quality measurement setup will also be described in the user guide and result for this
demo board using High Speed USB device. TDR measurement result will also be shown in this user guide.

Figure 1. Top view of PI3USB102

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Summary of Contents for PI3USB102

Page 1: ...user manual describes the components and operation of the PI3USB102 Demo Board USB2 0 high speed full speed and low speed signal quality measurement setup will also be described in the user guide and result for this demo board using High Speed USB device TDR measurement result will also be shown in this user guide Figure 1 Top view of PI3USB102 ...

Page 2: ...tiplexer Figure 2 shows the logical block diagram of PI3USB102 Figure 2 Logical Block Diagram of PI3USB102 In order to choose which output the Y Y connects to two header pins are provided on the demo board for user to choose the desired signal path Table 1 shows the truth table of the device SEL nOE Y Y X H Hi Z Hi Z L L M M H L D D Table 1 Truth Table of PI3USB102 ...

Page 3: ... Page 3 of 19 11 5 2013 AN 05 05 04 If nOE is connected to L and SEL is connected to L Y Y will connect to M M Figure 3 shows the signal path of this connection SEL nOE Y Y X H Hi Z Hi Z L L M M H L D D Figure 3 Signal path of connection to M M ...

Page 4: ... Page 4 of 19 11 5 2013 AN 05 05 04 If nOE is connected to L and SEL is connected to H Y Y will connect to M M Figure 4 shows the signal path of this connection Figure 4 Signal path of connection to D D SEL nOE Y Y X H Hi Z Hi Z L L M M H L D D ...

Page 5: ...Measurement Tektronix TDS7404 is used to measure Signal Quality of PI3USB102 The USB signal from High Speed USB device through PI3USB102 is compared with USB 2 0 High Speed UPSTREAM NEAR END eye mask Figure 5 shows the test setup of USB 2 0 High Speed test Figure 5 USB 2 0 High Speed Test Setup ...

Page 6: ...surement Name Minimum Maximum Mean pk pk Standard Deviation RMS Population Status Monotonic Property 0 Pass Eye Diagram Test Pass Signal Rate 470 1142Mbps 494 4532Mbps 480 0265Mbps 0 0000bps 4 089580Mbps 480 7090Mbps 513 Pass EOP Width 16 66155ns 1 Pass EOP Width Bits 7 997988 1 Pass Rise Time 739 5680ps 896 1289ps 807 2906ps 156 5609ps 34 96188ps 808 0402ps 107 Pass Fall Time 735 7871ps 861 8438p...

Page 7: ...Property 0 Pass Eye Diagram Test Pass Signal Rate 473 5376Mbps 492 7479Mbps 480 0623Mbps 0 0000bps 3 670153Mbps 480 6329Mbps 513 Pass EOP Width 16 70019ns 1 Pass EOP Width Bits 8 017130 1 Pass Rise Time 696 8445ps 840 6004ps 770 7400ps 143 7559ps 25 85369ps 771 1695ps 107 Pass Fall Time 707 7780ps 843 9054ps 772 5156ps 136 1273ps 28 84574ps 773 0489ps 107 Pass Table 3 High Speed Signal Quality Mea...

Page 8: ...otonic Property 0 Pass Eye Diagram Test Pass Signal Rate 473 1907Mbps 489 3789Mbps 480 0545Mbps 0 0000bps 2 961996Mbps 480 4405Mbps 513 Pass EOP Width 16 70521ns 1 Pass EOP Width Bits 8 019411 1 Pass Rise Time 566 0808ps 658 6335ps 605 0194ps 92 55269ps 19 01294ps 605 3152ps 107 Pass Fall Time 478 2657ps 671 5919ps 565 0937ps 193 3262ps 38 96274ps 566 4229ps 107 Pass Table 4 High Speed Signal Qual...

Page 9: ... AN 05 05 04 The USB signal from Full Speed USB device through PI3USB102 is compared with USB 2 0 Full Speed DOWNSTREAM FAR END eye mask Figure 7 shows the test setup of USB 2 0 Full Speed and Low Speed test setup Figure 5 USB 2 0 Full Speed and Low Speed Test Setup ...

Page 10: ...rossover Voltage 1 700000 V 1 960000 V 1 821494 V 260 0000mV 64 66396mV 1 822574 V 17 Pass EOP Width 165 8083ns 1 Pass Consecutive Jitter 692 1122ps 863 4434ps 0 0000s 1 555556ns 524 1401ps 507 4965ps 16 Pass Paired JK Jitter 400 0000ps 276 8254ps 2 539683ps 676 8254ps 211 5925ps 195 9130ps 7 Pass Paired KJ Jitter 204 4444ps 417 7778ps 30 36075ps 622 2222ps 217 9307ps 204 0361ps 7 Pass Table 5 Ful...

Page 11: ... 57 64284mV 1 849827 V 20 Pass EOP Width 165 7698ns 1 Pass Consecutive Jitter 978 1878ps 1 082909ns 0 0000s 2 061096ns 618 8819ps 602 3755ps 19 Pass Paired JK Jitter 320 5691ps 276 1086ps 68 33082ps 596 6777ps 181 1687ps 183 9682ps 9 Pass Paired KJ Jitter 380 6688ps 207 7325ps 99 02908ps 588 4013ps 187 7591ps 201 6272ps 8 Pass Table 6 Full Speed Signal Quality Measurement of connection to D D Addi...

Page 12: ...k Standard Deviation RMS Population Status Eye Diagram Test Pass Signal Rate 1 493664Mbps 1 509021Mbps 1 499836Mbps 0 0000bps 4 024761kbps 1 500093Mbps 31 Pass Crossover Voltage 1 706667 V 1 856364 V 1 796314 V 149 6970mV 34 28785mV 1 796626 V 22 Pass EOP Width 1 339729us 1 Pass Consecutive Jitter 2 837954ns 3 262011ns 0 0000s 6 099965ns 1 466047ns 1 430715ns 21 Pass Paired JK Jitter 1 321092ns 2 ...

Page 13: ...00bps 6 258799kbps 1 500167Mbps 31 Pass Crossover Voltage 1 709333 V 1 846154 V 1 795022 V 136 8205mV 40 85973mV 1 795465 V 22 Pass EOP Width 1 339144us 1 Pass Consecutive Jitter 2 944317ns 3 638171ns 0 0000s 6 582488ns 1 831335ns 1 787200ns 21 Pass Paired JK Jitter 3 493088ns 4 884084ns 132 7189ps 8 377171ns 2 885336ns 2 740486ns 10 Pass Paired KJ Jitter 4 197235ns 4 061412ns 92 67793ps 8 258647n...

Page 14: ...ng Specification Through Impedance 70Ω ZHSTRHU 110Ω At Termination Impedance 80Ω ZHSTERM 100Ω In the Exception Window a sliding 1 4 ns window inside the Through Impedance time window the differential impedance may exceed the Through limits No single excursion however may exceed the Through limits for more than twice the TDR rise time 400 ps Filter Rise Time 380ps Through Impedance D D Spec Units M...

Page 15: ...Pericom Semiconductor Corp www pericom com Page 15 of 19 11 5 2013 AN 05 05 04 Figure 10a TDR at D D of J3 Figure 10b TDR at D D of J4 ...

Page 16: ...Pericom Semiconductor Corp www pericom com Page 16 of 19 11 5 2013 AN 05 05 04 Appendix A PCB Schematic ...

Page 17: ...icom Semiconductor Corp www pericom com Page 17 of 19 11 5 2013 AN 05 05 04 Appendix B PCB Layout Requirements a Stack Up b Isolation Spacing 30 mil c Width Spacing W S of 90Ω Differential Trace 11 10 mil ...

Page 18: ... 2x3pin connector 2 54mm 1 J5 6 3pin 2 54mm Pin Header 2 C4 Ceramic Capacitor 0402 0 1uF 1 C5 Ceramic Capacitor 0402 10nF 1 C2 3 Ceramic Capacitor 0805 1uF 2 C6 Ceramic Capacitor 0805 4 7uF 1 C1 Tan Cap B Size 22uF 1 U1 USB2 0 High Speed 480Mbps Signal Switch TQFN10 1 R2 Resistor 0402 0R 1 R1 Resistor 0402 NC 1 J3 4 USB Type A Receptacle 2 J2 USB Type B Receptacle 1 ...

Page 19: ...Pericom Semiconductor Corp www pericom com Page 19 of 19 11 5 2013 AN 05 05 04 History Version 1 0 Original Version December 12 2007 Version 1 1 Eye Diagram is added December 20 2007 ...

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