RFSoC Data Converter Evaluation Tool User Guide
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UG1287 (v2018.2) October 1, 2018
Chapter 5:
Evaluation Tool System Configuration using the GUI
Digital Up Converter Configurations
The GUI supports:
• Setting the complex mixer functionality and NCO frequency
• Setting the interpolation rate on the filters
• Selecting and configuring the interpolation filters in the PL, if desired
• Configuring the quadrature modulator correction block
• Enabling and configuring dual band support
ADC Tone Testing
The GUI supports uploading ADC output data for all ADC channels one by one, but the
capture can happen simultaneously. The GUI supports the simultaneous capture
and
generation of samples in Real and Complex mode (in-phase and quadrature I/Q data).
For FFT analysis, the setup supports coherent sampling. The two basic requirements for
coherent sampling are:
• The sample clocks for the DAC (or external signal generator) and ADC are
frequency-locked. This is achieved if the ADC and DAC clocks are derived from the
same reference clock in the case of the on-chip PLLs or external PLLs that use the same
clock reference.
• The test signal (e.g., test tone) should generate an integer number of complete cycles
when sampled by the ADC at the specified rate because the FFT expects a periodic
signal. This is usually managed by carefully choosing the frequency of the input test
tone(s) to the ADC or output tone(s) from the DAC for a fixed sample clock setting. For
loopback testing, it means careful generation of the DAC output tone(s) frequency (i.e.,
SRAM vectors), which is sent to the DAC. This is automatically handled by the GUI for
DAC for CW generation. For the ADC, the recommended coherent tones are listed to
allow you to set external test equipment.