ZWorld Exp-A/D12, User Manual

Page: 78 / 111

XP8500
and
Exp-A/D12 78 s PLCBus
There are eight registers corresponding to the modes determined by bus
lines A1X, A2X, and A3X. The registers are listed in Table A-2.
Table A-2. PLCBus Registers
Register Address A3 A2 A1 Meaning
BUSRD0 C0 0 0 0 Read data, one way
BUSRD1 C2 0 0 1
Read data, another
way
BUSRD2 C4 0 1 0 Spare, or read data
BUSRESET C6 0 1 1
Read this register to
reset the PLCBus
BUSADR0 C8 1 0 0
First address nibble
or byte
BUSADR1 CA 1 0 1
Second address
nibble or byte
BUSADR2 CC 1 1 0
Third address
nibble or byte
BUSWR CE 1 1 1 Write data
Writing or reading one of these registers takes care of all the bus details.
Functions are available in Z-World’s software libraries to read from or
write to expansion bus devices.
To communicate with a device on the expansion bus, first select a register
associated with the device. Then read or write from/to the register. The
register is selected by placing its address on the bus. Each device recog-
nizes its own address and latches itself internally.
A typical device has three internal latches corresponding to the three
address bytes. The first is latched when a matching BUSADR0 is de-
tected. The second is latched when the first is latched and a matching
BUSADR1 is detected. The third is latched if the first two are latched and
a matching BUSADR2 is detected. If 4-bit addressing is used, then there
are three 4-bit address nibbles, giving 12-bit addresses. In addition, a
special register address is reserved for address expansion. This address, if
ever used, would provide an additional four bits of addressing when using
the 4-bit convention.
If eight data lines are used, then the addressing possibilities of the bus
become much greater—more than 256 million addresses according to the
conventions established for the bus.