Hardware Development Guide of Module Product
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MF206A
Waiting mode: The waiting mode of SPI is a configurable low-power mode, enabled by the byte of the control
registered. In the waiting mode, if the waiting byte is cleared, SPI works under the similar running mode.
However, if SPI waits for the position byte, SPI clock stops and enters the low-power status.
Stop mode: Under the stop mode, SPI is not available, so the power consumption is reduced. If SPI is configured
as the master equipment, any transmission process will be stopped, but it can enter the running mode when the
waiting mode stops. Figure 3–5 is the SPI bus sequence chart.
Figure 3–5 SPI Bus Sequence Chart
3.9
I2C Bus
3.9.1
Description of PINs
I2C is the two-wire bus for the communication between ICs, which supports any IC process (NMOS, CMOS,
dual-polarity). The two signal wires, serial data (SDA) and serial clock (SCL), can transmit information between
the connected equipment. Each equipment is identified by the unique address (such as the micro controller,
storage, LCD driver, audio DAC or keyboard interface). Due to the different functions of the equipment, it can
be used as both the sender and the receiver.