5-27
Z380
™
U
SER
'
S
M
ANUAL
Z
ILOG
DC-8297-03
AND
AND (BYTE)
AND [A,]src
src = R, RX, IM, IR, X
Operation
:
A
←
A AND src
A logical AND operation is performed between the corresponding bits of the source operand
and the accumulator and the result is stored in the accumulator. A 1 is stored wherever the
corresponding bits in the two operands are both 1s; otherwise a 0 is stored. The contents
of the source are unaffected.
Flags:
S:
Set if the most significant bit of the result is set; cleared otherwise
Z:
Set if all bits of the result are zero; cleared otherwise
H:
Set
P:
Set if the parity is even; cleared otherwise
N:
Cleared
C:
Cleared
Addressing
Execute
Mode
Syntax
Instruction Format
Time
Note
R:
AND [A,]R
10100-r-
2
RX:
AND [A,]RX
11y11101 1010010w
2
IM:
AND [A,]n
11100110 ——n—
2
IR:
AND [A,](HL)
10100110
2+r
X:
AND [A,](XY+d)
11y11101 10100110——d—
4+r
I
Field Encodings:
r:
per convention
y:
0 for IX, 1 for IY
w: 0 for high byte, 1 for low byte