© Copyright 2013 Zephyr Engineering, Inc
UDPSDR-
HF1 User’s Manual
21
Version 1.1
– 16 September 2013
An internal NIOS soft-core CPU controls all of the processes and the data flow. The
NIOS CPU also controls the boot loader functions and external flash memory
programming operations, not shown.
6 Specifications
Frequency Range: 100kHz to 30MHz, Digital Direct Sampling (DDS)
Input impedance: 50 ohms
RF input clipping level (typical): -7dBm
Maximum Display Bandwidth: 1.25MHz
Sampling Width and Rate: 14bits @ 80Msps
MDS: -118dBm @ 14MHz (500Hz BW) for 3dB noise floor increase
Antenna connection: standard SMA
Power consumption: +5VDC @ 400mA (including BeMicroSDK)
Dimensions, UDPSDR-
HF1: 31mm x 65mm (1.2”W x 2.6”L)
Dimensions, including BeMicroSDK: 33mm x 185mm (1.3”W x 7.3”L)
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