78
CIRCUIT
DESCRIPTION
TV1V
TV2V
S-Y1
S-C1
PinP TUNER (Mono)
Always PinP
ZP-94/95 SERIES CHASSIS SYNC SIGNAL PATH
I401
Lum/Audio Selector IC
23
10
3V
VOut1
U202
Avx 3 In
PinP
Video
17
15
60
Terminal PWB
Signal PWB 2 of 2
Front Control PWB
19
Main
Video
NTSC
Aux Input 3
V1
8
10
Aux
Inputs
U201
Main Tuner
63
Q205
5
3
S-Y3
S-C3
19
S-3 In
S-1 In
12
S-Y2
S-C2
V2
1
3
S-2 In
5
S Det.
S Det.
S Det.
18
Q206
14
V3V
PST1
PFT
3
PST2
Sub Video
VOut2
3
Main Y
/Video
I005
Z1
Z0
3
5
Q210
Q208
I001
Q019
Q018
4
4
Main Sub
SD Det
I003
53
44
Q403
Q402
Q021
28
Main for CCD
30
Sub for CCD
Q031
Q017
2
Q016
Y In Det
SDA1
SCL1
SCL1
SDA1
2
3
15
14
SIGNAL PWB 1 of 2
Composite 2
Composite 1
I015
1
4
10
I016
1
4
11
PST1
8
9
Q434
Q437
Q431
Q433
Component 1 Y
Component 2 Y
Sync Sep Comp 1
Sync Sep Comp 2
Composite 3
Aux Input 1
Aux Input 2
Also, see Main/Component Sync
Separation Circuit Diagram
Micro
Processor
Lo = MAIN
Hi = SUB
Lo
Hi