Zenith HDR230, Service Manual, Page: 48 / 94

3-40 3-41
6. BLOCK DIAGRAMS
1) OVERALL BLOCK DIAGRAM
D-Sub
9-Pin
CPU [PowerPC 405 GP]
-SDRAM Controller
-Peripheral Controller
-PCI Bridge, Local BUS I/F
-Serial(2), GPIO, I2C
Variable (Fixed)
Audio R/L out
Composite
Optical SPDIF out
Y,Pb,Pr
Audio
DAC
PCI Bus
Power
+3.3V
+5V
+5.4V
+12V
Live +5V
HD-1
-TP De-Mux
-MPEG Decoding : MP@HL
-Format Converter
-Host I/F, Memory I/F
-Digital I/F
-Video DAC, NTSC Encoder
VSB
Decoder
Tuner
(ATSC)
VSB
Audio Decoder
- Dolby AC -3
- MPEG Audio
- SPDIF Out
R,G,B, HS,VS
S-Video
Video
AMP
Peripheral Bus
Clock
Generator
E-IDE
I/F
I2C_C
ProbeROM
(0.5MB)
EEPROM
(32KB)
I2C_A
System
CPLD
Volume
Controller
RS-232C
Driver
Control
GPIO
Digital Audio
SPDIF
YPbPr or RGB
ITU -R.BT 656
External
PLL/VCXO
Glue Logic
Ethernet
I/F
HDD
Flash
8MB
MiCOM
IR In
Video
Type
S/W
Control
GPIO
Spliter
RCA
Conn.
PDR-Pro
- PCI I/F
- TP-Controller
SDRAM
(2Mx32Bit)
SDRAM
(2Mx32Bit)
PCI-IDE
Controller
[PCI0649]
128-Bit I/F
16(32)MByte
SDRAM
(2Mx32Bit)
SDRAM
(2Mx32Bit)
SDRAM
(2Mx32Bit)
SDRAM
(2Mx32Bit)
VSB TP
PVR
CPLD
FIFO
I2C_A
I2C_C
I2C
Controller -1
I2C_A
33MHz
Front Panel
33.3MHz- 1
33.3MHz- 2
12MH
33.3MHz- 1
12MHz
I2C_A
Power_On/Off
33.3MHz- 2
I2C_A
On/Off
control
RCA
Conn.
F
Conn.
F
Conn .
SDRAM
(8Mx16Bit)
Power_On/Off
SDRAM 32MB
SDRAM
(8Mx16Bit)
TP
MUX
Key In
LED
RF Loop Out
Coaxial SPDIF out
Variable (Fixed)
Audio R/L out
14.318MHz
8MHz
Peripheral
Bus
Video
Encoder
SAW
Filter
Down
Converter