XP8600
24
s
I/O Configurations
The AD7543 Chip
Each of the two AD7543 D/A converter chips receives serial data in Regis-
ter A. When Register A is full, its contents are transferred to Register B, as
shown in Figure 3-4. The data are then converted and the analog output is
asserted.
Each AD7543 has a linearity of ±1 LSB and a gain stability of approxi-
mately 5 ppm per degree Celsius.
Figure 3-4. Operation of AD7543 D/A Converter Chip
The output of each D/A converter chip is given by Equation (3-1).
OUT = (
input
/4096) × REF
(3-1)
The D/A converter output voltage ranges from 0 to REF. REF is 10 V
when U13 is an LT1021 (the factory default).
REF- is 2.5 V when the LT1019 is used at U13 to allow the
XP8600 to be used with 12 V controllers.
Voltage Output
The voltage output is selected by connecting pins 23 on header J1 or J2.
(It is possible to operate one channel with a voltage output and the other
channel with a current output.) The voltage output can be calculated using
Equation (3-2).
V = OUT × (1 + RP2/RP1)
(3-2)
where OUT is the output of the D/A converter chip. The output values can
be changed by changing resistor packs RP1 and RP2. The maximum
output voltage is limited by the op-amp to 14 V.
The op-amps U1C (Channel 1) and U1D (Channel 2) can carry a maxi-
mum of 20 mA. When using a channel in the voltage-output mode, its load
must have a resistance of at least 700
Ω
to keep the op-amp from saturating
prematurely.
Load Register B
12-bit shift reg (A)
AD7543
12-bit D/A converter
REF
LD
STB
OUT
SDI
!
Summary of Contents for XP8600
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