JOHNSON CONTROLS
123
SECTION 2 - OPTIVIEW CONTROL CENTER INTRODUCTION
FORM 160.78-O2
ISSUE DATE: 5/22/2017
2
MESSAGE
DESCRIPTION
VSD – LOGIC BOARD
PROCESSOR
This shutdown is generated if a communications problem occurs between the two mi-
croprocessors on the VSD Logic Board.
VSD – LOW DC BUS VOLTAGE
Following a successful dc-link pre-charge and pre-regulation, the dc-link under-voltage
shutdown is generated when the dc link voltage falls below the trip level for 10 ms. The
trip level is set to 720VDC (30VDC below the calculated DC link voltage setpoint of
750VDC for both 60 Hz and 50 Hz units).
VSD – LOW PHASE A INPUT
BASEPLATE TEMPERATURE
The temperature of the IGBT module of the input rectifier’s phase A has decreased
below the low limit of 37°F (2.7°C). All phase temperatures have to increase above the
fault-reset threshold of 42°F (5.5°C), for this fault to be cleared.
VSD – LOW PHASE B INPUT
BASEPLATE TEMPERATURE
See “VSD – LOW PHASE A INPUT BASEPLATE TEMPERATURE” message preceed
-
ing.
VSD – LOW PHASE C INPUT
BASEPLATE TEMPERATURE
See “VSD – LOW PHASE A INPUT BASEPLATE TEMPERATURE” message preceed
-
ing.
VSD – LOW PHASE A MOTOR
BASEPLATE TEMPERATURE
The temperature of the IGBT module of the inverter’s phase A has decreased below the
low limit of 37°F. All phase temperatures have to increase above the fault-reset thresh-
old of 42°F, for this fault to be cleared.
VSD – LOW PHASE B MOTOR
BASEPLATE TEMPERATURE
See “VSD – LOW PHASE A MOTOR BASEPLATE TEMPERATURE” message preceed
-
ing.
VSD – LOW PHASE C MOTOR
BASEPLATE TEMPERATURE
See “VSD – LOW PHASE A MOTOR BASEPLATE TEMPERATURE” message preceed
-
ing.
VSD – NOT RUNNING
The VSD has not reported run state via serial communications for 8 seconds while the
microboard issues a VSD run command. The fault is released when the microboard
command is “Stopped State”.
VSD – PHASE A INPUT DCCT
OFFSET
Upon the assertion of a precharge command, the output voltage of each of the DCCTs
which sense the input current will be monitored. The first value of each of those output
voltages will be compared against an offset threshold level of +/- 24.4 mv. If this thresh-
old level is not exceeded, an average of eight readings on each DCCT output will be
taken and used for DCCT offset compensation. If the offset threshold at initialization
exceeded this threshold, this shutdown is generated.
VSD – PHASE B INPUT DCCT
OFFSET
See “VSD – PHASE A INPUT DCCT OFFSET” message preceeding.
VSD – PHASE C INPUT DCCT
OFFSET
See “VSD – PHASE A INPUT DCCT OFFSET” message preceeding.
VSD – PHASE A INPUT GATE
DRIVER
The VSD boost rectifier’s IGBT gate driver boards monitor their power supply voltages,
as well as the saturation voltage drop across each main IGBT while turned on. If a
voltage on the Phase A boost rectifier IGBT gate driver board falls out of the prescribed
limit, the gate driver board shall turn the rectifier’s IGBTs off and send this shutdown.
VSD – PHASE B INPUT GATE
DRIVER
See “VSD – PHASE A INPUT GATE DRIVER” message preceeding.
VSD – PHASE C INPUT GATE
DRIVER
See “VSD – PHASE A INPUT GATE DRIVER” message preceeding.
VSD – PHASE A MOTOR GATE
DRIVER
The VSD inverter’s IGBT gate driver boards monitor their power supply voltages, as well
as the saturation voltage drop across each IGBT while turned on. If a voltage on the
Phase A gate driver board exceeds the prescribed limit, the gate driver board shall turn
the inverter’s’s IGBTs off and send this shutdown.
VSD – PHASE B MOTOR GATE
DRIVER
See “VSD – PHASE A MOTOR GATE DRIVER” message preceeding.
VSD – PHASE C MOTOR GATE
DRIVER
See “VSD – PHASE A MOTOR GATE DRIVER” message preceeding.
TABLE 8 -
CYCLING SHUTDOWN MESSAGES (CONT'D)
