★
All voltages are measured with a 10MΩ/V DC electronic voltmeter.
★
Components having special characteristics are marked
⚠
and must be replaced
with parts having specifications equal to those originally installed.
★
Schematic diagram is subject to change without notice.
● 電圧は、内部抵抗 10MΩの電圧計で測定したものです。
● ⚠印のある部品は、安全性確保部品を示しています。部品の交換が必要な場合、
パーツリストに記載されている部品を使用してください。
● 本回路図は標準回路図です。改良のため予告なく変更することがあります。
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
1
E
D
C
B
I
H
G
F
M
L
K
J
Q
P
O
N
U
T
S
R
Y
X
W
V
A
73
INPUT 3/4
YSP-1600
1.2
3.3
5.5
3.3
3.3
FL
SL
C/SW
SWL
DIGITAL IN
E M D 2
DSP_MISO
EMA9
/ E M C A S
EMBA1
FL_MISO
E M D 4
E M C L K
EMA2
E M D 1
EMA8
E M A 1
/ E M R A S
E M D 3
E M B A 0
E M C K E
E M D 1 0
E M D Q M 1
E M D 6
EMA11
E M D Q M 0
E M D 1 1
E M D 1 1
E M D 7
EMA4
E M A 3
DSP_FMT
E M B A 1
D S P _ N _ R S T
EMA10
E M D 9
E M D 3
DSP_N_RDY
EMA7
E M D 1 3
E M A 0
E M D Q M 0
E M C K E
E M D 2
E M D 1 5
E M C L K
E M A 8
EMA6
E M D 1 5
/ E M C S 0
/ E M C A S
E M D 9
DSP_MOSI
E M D 1 3
E M D 0
E M D 7
FL_MOSI
E M D 1 4
FL_N_CS
/ E M W E
EMBA0
E M D 0
E M D 1 4
FL_SCK
E M D 1 2
E M A 1 1
E M D 1 2
E M A 6
E M D 6
E M D 8
E M A 2
E M D 5
E M A 5
EMA1
EMA5
E M A 7
/ E M W E
E M D 1
E M D 1 0
/EMCS0
E M A 1 0
E M A 9
EMA0
E M D 5
/EMRAS
E M D Q M 1
DSP_N_INT
E M A 4
E M D 8
DSP_N_CS
E M D 4
D S P _ B C K
DSP_BCK
D S P _ C / S W
D S P _ H D M I
D S P _ N _ T R S T
D S P _ T M S
D S P _ T D I
D S P _ T C K
D S P _ T D O
P W M _ M C K
D S P _ B C K 1
D S P _ L R C K 1
D S P _ C / S W 1
D S P _ L R C K
DSP_LRCK
DSP_NTWK2
D S P _ N T W K 2
D S P _ M C K
D S P _ B C K
D S P _ L R C K
DSP_MCK
D S P _ M C K
EMA3
C607
10/6.3
D S P _ M O S I
D4_MISO
L604
BKP1005HS680-T
R609
33
D S P _ S L / S R
D S P _ S C K
M12L64164A-5TG2
X9625C0
IC604
1
V C C
2
D Q 0
3
V C C Q
4
D Q 1
5
D Q 2
6
V S S Q
7
D Q 3
8
D Q 4
9
V C C Q
10
D Q 5
11
D Q 6
12
V S S Q
13
D Q 7
14
V C C
15
D Q M L
16
W E
17
C A S
18
R A S
19
C S
20
A 1 3 / B A 0
21
A 1 2 / B A 1
22
A 1 0 / A P
23
A 0
24
A 1
31
A 6
3
2 A 7
33
A 8
34
A 9
35
A 1 1
36
N C
37
C K E
38
C L K
39
D Q M U
40
N C
41
V S S
42
D Q 8
43
V C C Q
44
D Q 9
45
D Q 1 0
46
V S S Q
47
D Q 1 1
48
D Q 1 2
49
V C C Q
50
D Q 1 3
51
D Q 1 4
52
V S S Q
53
D Q 1 5
54
V S S
25
A 2
27
V C C
28
V S S
30
A 5
26
A 3
29
A 4
L603
BLM21PG600SN1D
D S P _ M I S O
R602
4.7K
R619 47X4
L 6 0 2
B K P 1 0 0 5 H S 6 8 0 - T
D S P _ N _ I N T
R 6 3 4
4 7 X 4
C 6 0 5
1 8 P ( C H )
+ 1 . 2 D
+ 3 . 3 D
R607
33
C669
10/6.3
D4_N_WARNG
C602
10/6.3
+ 1 . 2 D
D G N D
D4_SCK
R 6 1 5
1 0 K
R612 47X4
R624
47X4
D S P _ S W L / S W R
R 6 2 1
4 . 7 K
+ 1 . 2 D
C 6 0 1
1 0 0 0 P ( B )
R606
33
D G N D
R 6 3 3
4 7 X 4
C 6 0 9
0 . 0 1 / 1 6 ( B )
R601
n o _ u s e
+ 3 . 3 D
C656
10/6.3
+ 3 . 3 D S P
I C 6 0 5
R P 1 3 2 S 1 2 1 B - E 2 - F
1 V O U T
2 G N D
3 N C
5
G N D
4
C E
6
V D D
D4_N_DISABLE
D S P _ F L / F R
D4_N_IRQ
I C 6 0 1
D 8 0 Y K 1 1 3 D P T P 4 0 0
Y D 9 9 8 D 0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
8 4
8 3
8 2
8 1
4 5
4 6
4 7
4 8
4 9
5 0
5 1
5 2
5 3
5 4
5 5
5 6
5 7
5 8
5 9
6 0
6 1
6 2
6 3
6 4
6 5
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
11
1
112
113
114
115
116
117
118
119
120
1 3 6
1 3 7
1 3 8
1 3 9
1 4 0
1 4 1
1 4 2
1 4 3
1 4 4
1 4 5
1 4 6
1 4 7
1 4 8
1 4 9
1 5 0
1 5 1
1 5 2
1 5 3
1 5 4
1 5 5
1 5 6
1 5 7
1 5 8
1 5 9
1 6 0
26
27
28
29
30
31
6 6
6 7
6 8
6 9
7 0
7 1
7 2
1 6 1
1 6 2
1 6 3
1 6 4
1 3 3
1 3 4
1 3 5
32
89
90
91
92
93
94
95
33
34
35
36
37
38
39
40
7 3
7 4
7 5
7 6
7 7
7 8
7 9
8 0
121
122
123
124
125
126
127
128
1 6 5
1 6 6
1 6 7
1 6 8
1 6 9
1 7 0
1 7 1
1 7 2
41
42
43
44
8 5
8 6
8 7
8 8
129
130
131
132
1 7 3
1 7 4
1 7 5
1 7 6
R 6 2 8 47
R 6 2 6 47
X L 6 0 1
2 0 M H Z
1
23
4
R611
33
R613
33
C 6 0 6
1 8 P ( C H )
L 6 0 1
B K P 1 0 0 5 H S 6 8 0 - T
D G N D
R 6 3 5
4 7 X 4
R 6 1 4
1 0 K
C603
470P(B)
+ 3 . 3 D S P
D4_N_CS
R605
33
D4_MOSI
R625 47X4
R616
10K
R623 47X4
R 6 2 7 33
D G N D
D S P _ W F L / W F R
C 6 6 3
1 0 / 6 . 3
DSP_SWL/SWR
R 6 2 9
4 7 X 4
C664
10/6.3
D G N D
D S P _ F M T
R 6 2 2
4 . 7 K
R618
10K
DSP_FL/FR
D G N D
DSP_SL/SR
D4_N_RST
R617
33
DSP_WFL/WFR
R 6 3 2
4 7 X 4
R 6 2 0
4 . 7 K
D G N D
D S P _ N _ R S T
DIR_MCK1
D G N D
D I R _ S D 0
+ 3 . 3 D S P
DC_PRT
D S P _ N _ R D Y
D S P _ N _ C S
I C 6 0 3
T C 7 4 V H C 5 4 1 F T ( E L
1
G 1
2
A 1
3
A 2
4
A 3
5
A 4
6
A 5
7
A 6
8
A 7
9
A 8
10
G N D
11
Y 8
12
Y 7
13
Y 6
14
Y 5
15
Y 4
16
Y 3
17
Y 2
18
Y 1
19
G 2
20
V C C
R630
47X4
R631
47X4
D G N D
D I R _ B C K
D I R _ W C K
PWM_N_RST
DAMP_N_OTW_SD
PWM_SDA
IR_N_MUTE
PWM_SCL
PWM_N_PDN
PWM_N_MUTE
REM_IN
N C P U _ A U P _ S D X 3
N C P U _ A U P _ S D X 2
N C P U _ A U P _ S D X 1
P_CON1
D S P _ H D M I 1
D S P _ B C K 2
D S P _ L R C K 2
D S P _ C / S W 2
STNBY_N_SW
PDET
KEY
DEST
19V_PRT
19V_PRI
+3.3D
S5.5
H D M _ S D 2 / D L 1
H D M _ S D 1 / D R 1
H D M _ S D 3 / D R 2
+5VA
+ 3 . 3 D
S3.3
R608
47
R603
47
R604
47
C604
100/6.3
C657
100/6.3
C655
100/6.3
C654
10/6.3
C673
100/6.3
C B 6 0 1
2 3 4 2 0 5 5 6 0 W 3
12
34
56
78
91
0
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
5
6
57
58
59
60
D S P _ N T W K
R636 47X4
D S P _ L R C K
D S P _ B C K
D S P _ M C K
R 6 5 6
4 7
D S P _ N T W K 2
C621
0.1/16(B)
C632
0.1/16(B)
C 6 1 1
0 . 1 / 1 6 ( B )
C637
0.1/16(B)
C 6 0 8
0 . 1 / 1 6 ( B )
C634
0.1/16(B)
C 6 1 2
0 . 1 / 1 6 ( B )
C 6 5 1
0 . 1 / 1 6 ( B )
C 6 5 3
0 . 1 / 1 6 ( B )
C 6 7 0
0 . 1 / 1 6 ( B )
C 6 7 2
0 . 1 / 1 6 ( B )
C 6 7 1
0 . 1 / 1 6 ( B )
C629
0.1/16(B)
C625
0.1/16(B)
C 6 1 0
0 . 1 / 1 6 ( B )
C 6 3 9
0 . 1 / 1 6 ( B )
C620
0.1/16(B)
C626
0.1/16(B)
C 6 5 2
0 . 1 / 1 6 ( B )
C 6 4 9
0 . 1 / 1 6 ( B )
C638
0.1/16(B)
C 6 1 7
0 . 1 / 1 6 ( B )
C 6 1 8
0 . 1 / 1 6 ( B )
C 6 4 4
0 . 1 / 1 6 ( B )
C 6 5 8
0 . 1 / 1 6 ( B )
C623
0.1/16(B)
C 6 6 1
0 . 1 / 1 6 ( B )
C 6 6 2
0 . 1 / 1 6 ( B )
C 6 1 4
0 . 1 / 1 6 ( B )
C624
0.1/16(B)
C 6 6 5
0 . 1 / 1 6 ( B )
C622
0.1/16(B)
C 6 5 0
0 . 1 / 1 6 ( B )
C667
0.1/16(B)
C627
0.1/16(B)
C635
0.1/16(B)
C 6 4 1
0 . 1 / 1 6 ( B )
C 6 4 5
0 . 1 / 1 6 ( B )
C633
0.1/16(B)
C 6 4 3
0 . 1 / 1 6 ( B )
C630
0.1/16(B)
C 6 1 5
0 . 1 / 1 6 ( B )
C 6 4 8
0 . 1 / 1 6 ( B )
C631
0.1/16(B)
C 6 5 9
0 . 1 / 1 6 ( B )
C 6 1 6
0 . 1 / 1 6 ( B )
C668
0.1/16(B)
C 6 1 9
0 . 1 / 1 6 ( B )
C 6 4 6
0 . 1 / 1 6 ( B )
C 6 1 3
0 . 1 / 1 6 ( B )
C 6 6 0
0 . 1 / 1 6 ( B )
C 6 4 0
0 . 1 / 1 6 ( B )
C 6 4 7
0 . 1 / 1 6 ( B )
C636
0.1/16(B)
C628
0.1/16(B)
C 6 6 6
0 . 1 / 1 6 ( B )
C 6 4 2
0 . 1 / 1 6 ( B )
D S P _ L R C K 3
D S P _ B C K 3
IC602
SPIFLASH
Y H 1 9 5 B 0
1
/CS
2
DO(io1)
3
/WP(IO2)
4
GND
5
DI(IO0)
6
CLK
7
/HOLD(IO3)
8
VCC
DVDD
D V D D
D V D D
UART0_TXD
EMB_A[1]
EMA_BA[1]
C V D D
E M B _ D [ 2 ]
E M B _ D [ 1 3 ]
6 4 M b i t
O S C V S S
T R S T
EMB_A[12]
EMA_A[2]
EMB_A[6]
E M B _ D [ 1 4 ]
R E S E T
E M B _ D [ 1 2 ]
A X R 1 [ 5 ]
AXR0[6]
D V D D
E M B _ W E _ D Q M [ 1 ]
EMA_A[5]
AXR0[4]
E M B _ D [ 0 ]
EMB_A[10]
E M B _ W E
AXR1[0]
CVDD
DVDD
A X R 1 [ 8 ]
AXR0[11]
E M B _ C L K
D V D D
SPI1_CLK
D V D D
DVDD
EMA_OE
E M A _ W E
EMB_A[3]
EMB_BA[0]
AXR0[7]
EMA_A[8]
EMA_A[0]
SPI0_SIMO[0]
CVDD
C V D D
CVDD
SPI0_SCS[0]
SPI0_CLK
CVDD
EMA_A[4]
AMUTE1
D V D D
EMB_A[2]
E M B _ D [ 1 5 ]
N C
EMA_A[1]
E M B _ D [ 6 ]
E M B _ W E _ D Q M [ 0 ]
F r o m / T o P C B M A I N
EMB_A[0]
D V D D
E M A _ D [ 6 ]
EMB_A[4]
A H C L K X 1
A C L K X 1
C V D D
EMA_A[3]
T D O
GP2[6]
EMB_BA[1]
EMB_CS[0]
SPI0_SOMI[0]
R S V 2
E M A _ D [ 1 ]
EMA_A[12]
U S B 0 _ D M
ACLKR0
C V D D
EMB_RAS
T C K
E M A _ D [ 2 ]
AHCLKR0
EMA_D[0]
CVDD
C V D D
UHPI_HRDY
E M B _ D [ 7 ]
AXR0[1]
C V D D
C V D D
E M A _ D [ 4 ]
AFSR0
N C
E M A _ D [ 3 ]
SPI1_ENA
D V D D
A F S R 1
DVDD
CVDD
EMA_A[10]
EMA_A[7]
T M S
P L L 0 _ V D D A
E M B _ D [ 1 1 ]
C V D D
GP2[5]
E M B _ D [ 1 ]
EMB_A[8]
A X R 1 [ 2 ]
D V D D
R T C _ X I
DVDD
A X R 1 [ 3 ]
AXR0[10]
SPI1_SCS[0]
AXR1[11]
AXR0[8]
D V D D
C V D D
AXR0[5]
A X R 1 [ 6 ]
DVDD
AXR1[10]
U S B 0 _ V D D A 1 8
E M B _ D [ 3 ]
E M B _ C A S
SPI1_SOMI[0]
E M A _ D [ 5 ]
A X R 1 [ 7 ]
AXR0[3]
O S C O U T
O S C I N
UART0_RXD
AXR0[9]
C V D D
EMB_A[7]
EMA_A[11]
D V D D
A F S X 1
AXR0[2]
DVDD
ACLKX0
AXR0[0]
EMA_A[9]
E M A _ D [ 7 ]
E M B _ D [ 9 ] /
E M B _ S D C K E
C V D D
U S B 0 _ D P
SPI1_SIMO[0]
EMA_A[6]
D V D D
R T C _ C V D D
EMB_A[5]
U S B 0 _ V D D A 3 3
G P 7 [ 1 4 ]
CVDD
T D I
E M B _ D [ 8 ]
A C L K R 1
E M B _ D [ 5 ]
DVDD
A X R 1 [ 4 ]
SPI0_ENA
P L L 0 _ V S S A
U S B 0 _ V D D A 1 2
AHCLKX0
DVDD
EMB_A[11]
EMA_BA[0]
S E R I A L F L A S H B O O T
E M B _ D [ 4 ]
S D R A M
DVDD
E M B _ D [ 1 0 ]
EMB_A[9]
A X R 1 [ 1 ]
AFSX0
T o H D M I / S W
F r o m D I R 0 0 2 . s h t
F r o m N e t w o r k 0 0 2 . s h t
F r o m H D M I 0 0 1 . s h t
F r o m / T o C P U 0 0 2 . s h t
F o r J T A G D e b u g
D4_N_IRQ
DGND
D4_SCK
DGND
D4_MISO
D4_MOSI
D4_N_CS
IR_N_MUTE
P-CON
DGND
PWM_MCK
DGND
DSP_BCK
DGND
DSP_LRCK
DGND
DSP_SWL/SWR
DSP_C/SW
DSP_FL/FR
DSP_SL/FR
DSP_WFL/WFR
DGND
+3.3D
DGND
DGND
S5.5
S3.3
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
D4_N_DISABLE
D4_N_RST
D4_N_WARNG
DAMP_N_OTW_SD
PWM_N_MUTE
PWM_N_RST
PWM_SDA
PWM_SCL
PWM_N_PDN
STNBY_N_SW
PDET
KEY
REM_IN
+5VA(D4_PRT)
DEST
19V_PRT
19V_PRI
DC_PRT
+3.3D
S5.5
DGND
A
PWM_MCK
DSP_BCK1
DSP_LRCK1
DSP_C/SW1
S5.5
S5.5
+3.3D
+3.3D
T o N e t w o r k D i s t r i b u t i o n S e l e c t o r
T o S W D A C & P C B M A I N
RESISTOR
REMARKS
NO MARK
PARTS
NAME
CARBON
CARBON
METAL
METAL
METAL
FIRE
CEMENT
SEMI
FILM RESISTOR
FILM RESISTOR
OXIDE FILM RESISTOR
FILM RESISTOR
PLATE RESISTOR
PROOF CARBON FILM RESISTOR
MOLDED RESISTOR
VARIABLE
RESISTOR
(P=5)
(P=10)
CHIP RESISTOR
N O T I C E
U.S.A
G
CANADA
EUROPE
L
CHINA
AUSTRALIA
SINGAPORE
KOREA
GENERAL
U
C
T
A
K
R
JAPAN
(model)
B
BRITISH
J
SOUTH EUROPE
E
V
TAIWAN
F
RUSSIAN
P
LATIN AMERICA
S
BRAZIL
H
THAI
REMARKS
CAPACITOR
PARTS NAME
NO
NO
MARK
MARK
ELECTROLYTIC
CAPACITOR
CERAMIC CAPACITOR
POLYESTER FILM CAPACITOR
POLYSTYRENE FILM CAPACITOR
MICA CAPACITOR
POLYPROPYLENE
FILM CAPACITOR
SEMICONDUCTIVE CERAMIC CAPACITOR
P
TANTALUM
CAPACITOR
TUBULAR
S
CAPACITOR
CERAMIC
FILM
SULFIDE
POLYPHENYLENE
CAPACITOR
VDD
A3
A2
A1
A0
A10/AP
A12
A13
CS
RAS
CAS
WE
LDQM
VDD
VSSQ
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
VDDQ
VDDQ
VSSQ
DQ0
VDD
VSS
A4
A5
A6
A7
A8
A9
A11
NC
CKE
CLK
UDQM
NC
VSS
VDDQ
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
VSSQ
VSSQ
VDDQ
DQ15
VSS
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
IC604
: M12L64164A-5TG
1M x 16-bit x 4 banks synchronous DRAM
CLK
CS
RAS
CAS
WE
C
ommand Decoder
C
ontr
ol Logic
Latch Cir
cuit
Input and Output
Buf
fer
R
o
w Decoder
Bank A
Sense Amplifier
Column Decoder
Data Control Circuit
L(U)DQM
DQ
CKE
Address
Clock
Generator
Row
Address
Buffer
Column
Address
Buffer
and
and
Refresh
Counter
Refresh
Counter
Mode
Register
Bank B
Bank C
Bank D
V
DD
CE
Vref
6
1
4
2,5
Current Limit
Thermal Shutdown
V
OUT
GND
Pin No.
1
2
3
4
Symbol
V
OUT
GND
CE
NC
Description
Output Pin
Ground Pin
No Connection
GND
Ground Pin
Chip Enable ("H" Active)
5
6
V
DD
Input Pin
IC605
: RP132S121B-E2-FE
Voltage regulator
IC601:
D80YK113DPTP400
Digital signal processor
PLL/Clock
Generator
w/OSC
Memory Protection
C674x
TM
DSP MICRO-
PROCESSOR
Power/Sleep
Controller
Pin
Multiplexing
RTC/
32-KHz
OSC
GPIO
EDMA3
DMA
Serial Interface
External Memory Interface
Control Timers
Connectivity
Shared Memory
Audio Ports
dMAX
System Control
Peripherals
Input
Clock(s)
JTAG Interface
Switched Control Resource (SCR)
DSP Subsystem
AET
256 KB L2 RAM
32 KB
L1 Pgm
32 KB
L1 RAM
1024 KB L2 ROM
128 KB
RAM
General-
Purpose
Timer
General-
Purpose
Timer
(Watchdog)
McASP
w/FIFO
UART
I
2
C
SPI
eHRPWM
eQEP
HPI
USB2.0
OTG Ctlr
PHY
MMC/SD
(8b)
EMIFA(8b/16b)
NAND/Flash
16b SDRAM
EMIFB
SDRAM Only
(16b/32b)
eCAP
IC602
: W25Q80BVSSIG
8 M-bit flash memory with dual and quad SPI
Block Segmentation
xxFF00h
xxF000h
∙
xxFFFFh
xxF0FFh
∙
xx2F00h
xx2000h
∙
xx2FFFh
xx20FFh
∙
xx0F00h
xx0000h
∙
xx0FFFh
xx00FFh
Write Control
Logic
/WP(IO
2
)
∙
xx1F00h
xx1000h
∙
xx1FFFh
xx10FFh
∙
xxDF00h
xxD000h
Sector 15 (4KB)
Sector 14 (4KB)
Sector 13 (4KB)
Sector 2 (4KB)
Sector 1 (4KB)
Sector 0 (4KB)
∙
∙
∙
∙
xxDFFFh
xxD0FFh
∙
xxEF00h
xxE000h
∙
xxEFFFh
xxE0FFh
∙
0FFF00h
0F0000h
∙
0FFFFFh
003000h
0030FFh
002000h
0020FFh
001000h
0010FFh
000000h
0000FFh
0F00FFh
∙
Block 15 (64KB)
Security Register 3 - 0
∙
∙
∙
∙
∙
∙
08FF00h
080000h
∙
08FFFFh
0800FFh
∙
Block 8 (64KB)
07FF00h
070000h
∙
07FFFFh
0700FFh
∙
Block 7 (64KB)
00FF00h
000000h
∙
00FFFFh
0000FFh
∙
Block 0 (64KB)
Write Protect Logic and Row Decode
Status
Register
High Voltage
Generators
Page Address
Latch / Counter
Byte Address
Latch / Counter
Column Decode
And 256-Byte page Buffer
Beginning
Page Address
Data
Ending
Page Address
SPI
Command
and
Control Logic
/HOLD(IO
3
)
CLK
/CS
DI(IO
0
)
DO(IO
1
)
7
6
1
5
2
3
W25Q80BV
1
G1
A1
A2
A3
A4
A5
A6
A7
A8
GND
Vcc
G2
Y8
Y7
Y6
Y5
Y4
Y3
Y2
Y1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
IC603
: TC74VHC541FT
Octal bus buffer
Details of colored lines
Red / full line:
Power supply (+)
Red /dashed line: Power supply (-)
Orange: Signal
detect
Yellow: Clock
Green: Protection
detect
Brown: Reset
signal
Blue:
Panel key input
DSP
BUFFER
SDRAM
SERIAL ROM
to INPUT 2/4
to INPUT 2/4
to INPUT 1/4
to INPUT 2/4
No replacement part available.
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