T5n/T4n/T3n
19
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
PE1/TIOC4C/DACK0/AH
PE15/TIOC4D/DACK1/IRQOUT
Vss
PC0/A0
PC1/A1
PC2/A2
PC3/A3
PC4/A4
PC5/A5
PC6/A6
PC7/A7
PC8/A8
PC9/A9
PC10/A10
PC11/A11
PC12/A12
PC13/A13
PC14/A14
PC15/A15
PB0/A16
Vcc
PB1/A17
Vss
PB2/IRQ0/POE0/RAS
PB3/IRQ1/POE1/CASL
PB4/IRQ2/POE2/CASH
Vss
PB5/IRQ3/POE3/RDWR
PB6/IRQ4/A18/BACK
PB7/IRQ5/A19/BREQ
PB8/IRQ6/A20/WAIT
PB9/IRQ7/A21/ADTRG
Vss
PA14/RD
WDTOVF
PA13/WRH
Vcc
PA12/WRL
Vss
PA11/CS1
PA10/CS0
PA9/TCLKD/IRQ3
PA8/TCLKC/IRQ2
PA7/TCLKB/CS3
PA6/TCLKA/CS2
PA5/SCK1/DREQ1/IRQ1
PA4/TXD1
PA3/RXD1
PA2/SCK0/DREQ0/IRQ0
PA1/TXD0
PA0/RXD0
PD15/D15
PD14/D14
PD13/D13
Vss
PD12/D12
Port E / MTU I/O / DMA transfer strobe / Address hold
Port E / MTU I/O / DMA transfer strobe / Interrupt request output
Ground
Port C / Address bus
Port B / Address bus
Power supply
Port B / Address bus
Ground
Port B / Interrupt request / Port output enable / Row address strobe
Port B / Interrupt request / Port output enable / Lower column address strobe
Port B / Interrupt request / Port output enable / Upper column address strobe
Ground
Port B / Interrupt request / Port output enable / DRAM read/write
Port B / Interrupt request / Address bus / Bus request acknowledge
Port B / Interrupt request / Address bus / Bus request
Port B / Interrupt request / Address bus / Wait
Port B / Interrupt request / Address bus / A/D conversion trigger input
Ground
Port A / Read
Watchdog time overflow
Port A / Upper write
Power supply
Port A / Lower write
Ground
Port A / Chip select
Port A / MTU timer clock input / Interrupt request
Port A / MTU timer clock input / Chip select
Port A / Serial clock / DMA transfer request / Interrupt request
Port A / Data transmission
Port A / Data reception
Port A / Serial clock / DMA transfer request / Interrupt request
Port A / Data transmission
Port A / Data reception
Port D / Data bus
Ground
Port D / Data bus
I/O
I/O
I
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
O
I
I/O
I/O
I/O
I
I/O
I/O
I/O
I/O
I/O
I
O
O
O
I
O
I
O
O
I
I
I/O
I/O
I/O
O
I
I/O
O
I
I/O
I/O
I/O
I
I/O
PIN
No.
NAME
FUNCTION
I/O
PIN
No.
NAME
I/O
FUNCTION
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
PD11/D11
PD10/D10
PD9/D9
PD8/D8
Vss
PD7/D7
PD6/D6
PD5/D5
Vcc
PD4/D4
PD3/D3
PD2/D2
PD1/D1
PD0/D0
Vss
XTAL
MD3
EXTAL
MD2
NMI
Vcc
MD1
MD0
PLLVcc
PLLCAP
PLLVss
PA15/CK
RES
PE0/TIOC0A/DREQ0
PE1/TIOC0B/DRAK0
PE2/TIOC0C/DREQ1
PE3/TIOC0D/DRAK1
PE4/TIOC1A
Vss
PF0/AN0
PF1/AN1
PF2/AN2
PF3/AN3
PF4/AN4
PF5/AN5
AVss
PF6/AN6
PF7/AN7
AVcc
Vss
PE5/TIOC1B
Vcc
PE6/TIOC2A
PE7/TIOC2B
PE8/TIOC3A
PE9/TIOC3B
PE10/TIOC3C
Vss
PE11/TIOC3D
PE12/TIOC4A
PE13/TIOC4B/MRES
I/O
I/O
I/O
I/O
I
I/O
I/O
I/O
I
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
I
I
I
I
I
I
I
O
I
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
I
I
I
I
I
I
I
I/O
I
I/O
I/O
I/O
I/O
I/O
I
I/O
I/O
I/O
Port D / Data bus
Ground
Port D / Data bus
Power supply
Port D / Data bus
Ground
Crystal oscillator
Mode set
External clock
Mode set
Non-maskable interrupt request
Power supply
Mode set
PLL power supply
PLL capacitance
PLL ground
Port A / System clock
Power-on reset
Port E / MTU I/O / DMA transfer request
Port E / MTU I/O / DREQ request acknowledgement
Port E / MTU I/O / DMA transfer request
Port E / MTU I/O / DREQ request acknowledgement
Port E / MTU I/O
Ground
Port F / Analog input
Analog ground
Port F / Analog input
Analog power supply
Ground
Port E / MTU I/O
Power supply
Port E / MTU I/O
Ground
Port E / MTU I/O
Port E / MTU I/O / Manual reset
•
HD64F7044F28V
(X5719E00)
CPU
www.freeservicemanuals.info
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Summary of Contents for T3n
Page 3: ...T5n T4n T3n 3 SPECIFICATIONS www freeservicemanuals info Free World of Manuals ...
Page 4: ...T5n T4n T3n 4 www freeservicemanuals info Free World of Manuals ...
Page 5: ...T5n T4n T3n 5 総合仕様 www freeservicemanuals info Free World of Manuals ...
Page 6: ...T5n T4n T3n 6 www freeservicemanuals info Free World of Manuals ...
