A
B
C
D
E
F
G
H
1
2
3
4
5
6
I
J
K
L
M
N
7
8
9
10
93
RX-V757/DSP-AX757/DSP-AX757SE
RX-V657/HTR-5860
■
SCHEMATIC DIAGRAM (SUBTRANS)
CPU
C-INPUT SELECTOR
Y-INPUT SELECTOR
VIDEO DRIVER
Y/C MIX
ON SCREEN
S-SIGNAL DETECTOR
REGULATOR
REGULATOR
SW
4.9
-12.0
4.9
4.9
-12.0
4.9
4.9
-12.0
4.9
4.9
4.9
0
4.9
0
2.1
~
~
~
~
~
~
~
~
~
0
10.0
10.0
0.1
10.0
1.0
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
~
1.0
~
0
0.2
~
0
0.2
0
5.0
5.2
0
0
0
0
4.9
0
0
0.8
0.1
5.0
5.0
5.0
~
0
0.4
4.9
10.0
0
5.6
5.6
4.9
5.6
5.1
5.6
4.9
4.9
4.9
5.0
4.9
0.1
0
0.1
4.3
4.9
4.9
4.9
4.9
4.9
4.9
0
4.9
4.9
2.1
0.4
4.9
1.0
4.9
4.9
0
3.6
4.9
4.9
4.9
4.9
0.1
0.1
0.1
4.9
4.9
4.9
4.9
4.9
0
4.9
4.9
4.9
4.2
4.9
4.9
0.1
0
0.1
0.1
0.1
0
0.1
4.9
0.1
5.0
5.1
5.0
4.9
4.9
4.8
0
0
0
0
0
0
0
4.9
0
0
0.1
0
0.1
4.9
0.1
0.1
0.1
0.1
0.1
4.9
4.9
4.5
4.9
0.8
4.4
4.9
0
0
0
4.9
4.9
2.4
0
2.3
4.9
4.9
4.9
4.9
0.2
0
0
4.9
4.9
4.9
0
0
0.1
0.4
0
0
4.2
AC 152.6
AC 7.5
2
3
CH 2
3
CH 1
0.7
0.9
0
3.6
3.6
4.9
0
0
4.8
0.7
0.7
0.7
0
0
0
0
0
0
0
-4.9
0
4.7
0
0
0
4.9
0
0
0.7
0
0
0
-0.1
0
-4.9
0
4.8
0.7
2.5
2.5
2.5
2.5
2.5
2.5
0
0
0
0
0
4.7
0
0
4.7
4.3
0
4.8
0
4.4
4.8
4.8
0.9
0.3
-0.5
4.3
4.3
4.7
0
0
0
0
0
0
-4.9
0
4.7
0
0
0
4.9
0
0
0
4.8
-0.1
0
-0.2
-4.9
-0.5
-0.2
0
0.5
4.1
-1.8
-1.0
4.8
0.9
4.1
0.9
0.2
-0.5
-0.5
0
0.5
-0.6
-0.6
0
0
4.5
4.7
2.3
0
2.4
0
4.7
2.3
2.4
4.7
0.7
0.7
4.7
4.7
4.7
4.7
0
4.7
0.9
1.9
4.7
0.9
0
1.6
4.8
0.6
4.8
0.9
0
4.8
0.3
0.9
1.6
-0.4
0.2
0.5
0.5
-0.2
4.8
-4.9
1.0
4.8
0.2
0.9
4.8
-0.6
0.1
4.8
0.9
0.1
-0.4
0
0.5
0.5
4.4
1.0
0.9
0.9
0.9
0
0
-4.9
0
4.7
-0.1
-4.9
4.7
-0.1
-0.1
0
0
4.7
0
4.7
-0.1
0
-4.9
-4.9
4.7
4.7
-4.9
0
0
0
0
0
0
3.6
0
0
-4.9
0
0
-4.9
-4.9
-4.9
0
0
0
4
X: NOT USED
X: NOT USED
X: NOT USED
Page 89 D-8
TO OPERATION (1) CB801
Page 85 J-1
TO DSP CB1
Page 87 E-1
TO FUNCTION (1) CB304
Page 87 C-1
TO FUNCTION (1) CB303
Page 94 B-3
TO CONVERSION (1) CB704
Page 90 G-10
TO MAIN (2) CB122
Page 90 F-1
TO MAIN (1) W10
Page 87 L-1
TO FUNCTION (2) CB901
Page 93 E-3
TO SUBTRANS (3) CB602
TO POWER TRANSFORMER
TO POWER CABLE
P
age 90 G-10
T
O
MAIN (2) CB121
Page 93 E-8
TO SUBTRANS (3) CB601
Page 94 C-9
TO CONVERSION (1) CB705
Page 93 G-3
TO SUBTRANS (3) CB603
Page 87 L-5
TO FUNCTION (2) CB902
Page 94 J-3
TO CONVERSION (2) CB832
Page 87 B-2
TO FUNCTION (1) CB301
Page 93 I-3
TO SUBTRANS (2) CB462
Page 93 D-3
TO SUBTRANS (7) CB447
Page 93 D-2
TO SUBTRANS (8) CB445
T
O
AM/FM
TUNER
P
age 95 I-3
T
O
XM CB24
2
Page 87 B-2
TO FUNCTION (1) CB302
L
U, C only
ON SCREEN
4
27K
150
330
0.1/16
(Specifications for the beginnings of production) /
（生産初期の仕様）
HTR-5860
* All voltages are measured with a 10M
Ω
/V DC electronic volt meter.
* Components having special characteristics are marked
Z
and
must be replaced with parts having specifications equal to
those originally installed.
* Schematic diagram is subject to change without notice.
* 電圧は、内部抵抗10MΩの電圧計で測定したものです。
*
Z
印のある部品は、安全性確保部品を示しています。部品の交換が必要な場合、
パーツリストに記載されている部品を使用してください。
* 本回路図は、標準回路図です。改良のため予告なく変更することがございます。
Point
w
(Pin 13 of IC451)
Point
e
CH 1 : Cathode of D452
CH 2 : Pin 12 of IC451
↑
AC POWER ON
(Connect the power cable)
↑
AC POWER OFF
(Disconnect the power cable)
↑
AC POWER ON
(Connect the power cable)
IC605 : LA7109
75
Ω
Video Driver
6dB
DR
6dB
DR
6dB
DR
1
2
3
4
5
6
7
8
36
35
34
33
32
31
30
29
VIN1+
NFB1
MUTE1
VIN2+
NFB2
–VCC1
VIN3+
NFB3
N.C.
N.C.
+VCC1
VOUT1
GND
VOUT2
DR CTL2
VOUT3
MUTE4
–VCC4
N.C.
N.C.
6dB
DR
6dB
DR
6dB
DR
11
12
13
14
15
16
17
18
26
25
24
23
22
21
20
19
VIN4+
NFB4
MUTE2
VIN5+
NFB5
–VCC2
VIN6+
NFB6
+VCC2
VOUT4
GND
VOUT5
DR CTL1
VOUT6
MUTE3
–VCC3
28
27
9
10
Point
r
(Pin 3 of IC606)
IC601, 602 : MM74HC4051SJX
Analog Multiplexers/Demultiplexers
LEVEL
CONVERTER
BINARY TO 1-OF-8
DECODER WITH INHIBIT
11
10
9
8
7
6
16
13
SW
SW
SW
SW
SW
SW
SW
SW
14
15
12
1
5
2
4
3
INHIBIT
VDD
X
A
B
C
VSS
VEE
X0
X1
X2
X3
X4
X5
X6
X7
INPUT STATES
INHIBIT
0
0
0
0
0
0
0
0
1
C
0
0
0
0
1
1
1
1
X
B
0
0
1
1
0
0
1
1
X
A
0
1
0
1
0
1
0
1
X
“ON” CHANNEL (S)
0
1
2
3
4
5
6
7
NONE
IC603, 604 : MM74HC4053SJX
Analog Multiplexers/Demultiplexers
16
VDD
LOGIC LEVEL
CONVER
TER
12
OX
7
VEE
6
INH
OUT C IN
13
IX
OUT C IN
2
OY
OUT C IN
1
IY
OUT C IN
5
OZ
OUT C IN
3
IZ
OUT C IN
4
Z-COMMON
15
14
X-COMMON
Y-COMMON
9
C
10
B
11
A
8
VSS
INHIBIT
(Pin 6)
L
L
L
L
L
L
L
L
H
CONTROL INPUTS
“ON” CHANNEL
0X (Pin 12), 0Y (Pin 2), 0Z (Pin 5)
1X (Pin 13), 1Y (Pin 1), 1Z (Pin 3)
0X, 0Y, 0Z
1X, 0Y, 0Z
0X, 1Y, 0Z
1X, 1Y, 0Z
0X, 0Y, 1Z
1X, 0Y, 1Z
0X, 1Y, 1Z
1X, 1Y, 1Z
NOTE
C
(Pin 9)
L
L
L
L
H
H
H
H
*
B
(Pin 10)
L
L
H
H
L
L
H
H
*
A
(Pin 11)
L
H
L
H
L
H
L
H
*
* Don’t Care
1A
1Y
2Y
VDD
6A
1
2
3
4
11
2A
6Y
5A
12
13
14
3A
3Y
5Y
4A
5
6
7
VSS
4Y
8
9
10
IC609, 903 : TC74HCU04AFEL
Hex Inverters
IC402 : TC4013BP
Dual D Flip Flop
1
2
3
4
5
6
7
1Q
1CP
1CL
1PR
1DATA
1Q
VSS
14
13
12
11
10
9
8
VDD
2Q
2CP
2CL
2PR
2DATA
Q
CP
CL
Q
D
PR
2Q
Q
CP
CL
Q
D
PR
IC606 : LC74781-9798
On-screen Display Controller
HORIZONTAL
DISPLAY POSITION
DETECTION
HORIZONTAL
DIRECTION
CHARACTER SIZE
REGISTER
HORIZONTAL
SIZE COUNTER
SYNCHRONOUS
SEPARATION
CHARACTER
OUTPUT
DOT CLOCK
GENERATOR
SYNCHRONOUS
DISTINCTION
COMPLEX
SYNCHRONOUS
SIGNAL
SEPARATION
CONTROL
TIMING
GENERATOR
SYNCHRONOUS
SIGNAL
GENERATOR
CHARACTER OUTPUT CONTROL
BACKGROUND CONTROL
VIDEO OUTPUT CONTROL
SHIFT
REGISTER
FONT ROM
VERTICAL
DISPLAY POSITION
DETECTION
FLASHING &
CONVERSION
CONTROL
CIRCUIT
DECODER
DECODER
DISPLAY
RAM
8 BIT
LATCH
+
COMMAND
DECODER
FLASHING &
CONVERSION
CONTROL
REGISTER
DISPLAY
CONTROL
REGISTER
RAM
WRITE
ADDRESS
COUNTER
SIN
SCLK
SERIAL
PARALLEL
CONVERSION
VDD1
CHARA
OSC IN
CTRL
2
XTAL
IN
XTAL
OUT
CTRL
1
CV
IN
CV
OUT
BLANK
OSC OUT
SYN IN
SEP C
SEP OUT
CTRL3
SEP IN
VDD2
VSS1
CHARACTER
CONTROL
COUNTER
LINE
CONTROL
COUNTER
CS
RST
VERTICAL DIRECTION
CHARACTER SIZE
REGISTER
HORIZONTAL
DISPLAY
POSITION
REGISTER
VERTICAL
DISPLAY
POSITION
REGISTER
VERTICAL
SIZE COUNTER
HORIZONTAL
DOT COUNTER
VERTICAL
DOT COUNTER
IC607, 608 : TK15420M
Video Amp
–
+
OUT1
–IN1
–VCC
+VCC
OUT2
1
2
3
4
5
+IN1
–IN2
+IN2
–
+
6
7
8
IC901 : M35012-133SP
On-screen Display Controller
INPUT
CONTROL
DATA
CONTROL
ADDRESS
CONTROL
OSC
(DISPLAY)
DISPLAY
CONTROL
NTSC
VIDEO
OUTPUT
TUNING
SIGNAL
OSC
TUNING
SIGNAL
SELECTOR
SHIFT
REGISTER
BLANKING
CIRCUIT
TIMING
GENERATOR
TIMING
GENERATOR
DISPLAY
CONTROL
REGISTER
DISPLAY DATA MEMORY
H COUNTER
DISPLAY CHARACTER ROM
TIMING
SIGNAL
SEPARATION
DISPLAY
POSITION
DETECTOR
ADDRESS READ
CONTROL
4
SCK
5
SIN
20
VDD1
7
VDD2
11
VSS
12
P0
8
CVIDEO
17
OSC IN
16
OSC OUT
9
LECHA
10
CVIN
1
OSC 1
2
OSC 2
18
HOR
19
VER
T
13
P1
14
P2
15
P3
3
CS
6
AC
