Yamaha HTR-6295, Service Manual

Page: 138 / 163

A
1
2
3
4
5
6
7
8
9
10
B C D E F G H I J K L M N
RX-V2065/HTR-6295
138
GUI 2/2
★
All voltages are measured with a 10MΩ/V DC electronic voltmeter.
★
Components having special characteristics are marked ⚠ and must be replaced
with parts having specifications equal to those originally installed.
★ Schematic diagram is subject to change without notice.
IC551
IC553
IC550
IC552
CB550
CB551
3.3
3.3
3.3
3.3
3.3
3.3
3.3
0
0
0
0
0
0
3.3
0
0
1.9
1.9
3.3 3.3
3.3
3.3
3.3 3.3
0 0
1.0 0.9 5.0
0 0
0
0 0
1.3
0 0 0 0 0 0 0 0 0 0 0
0 0
1.3 0
1.9
3.3 3.3 1.3
3.3
0
5.0
4.3 0 0 0
0
0 0 0 0 0 0 3.3 0 0 0 0
0 0 0 0 0 0
0 0
3.3 0
3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3
3.3 3.3
1.9
0
3.3
3.3
3.3
3.3
3.3
0
3.3
4.3
3.3
3.3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4.3
5.0
5.0
0
0
0
0
3.3
0
0
0
0
0
3.3
0
0
0
1.8
0
0
3.3
3.1
3.1
0
3.3
0
0
0
0
0
0
0
0
0
1.3
3.3
3.3
1.9
1.0
0.8
0
1.8
3.3
0
0 0 0 0 0 0
3.3
0
3.3
0
3.3
0
0 0
3.3 3.3
0
3.3 3.3 3.3 3.3
0
1.3
0
3.3 3.3 3.3 3.3 3.3
0
3.3
0.2 0
POINT J XL550 (Pin 11 of IC551) POINT K XL551 (Pin 5 of IC553)
J
K
V
IN
4
EN 1
2
5
GATE
CONTROL
UVLO
THERMAL
SHUTDOWN
CURRENT
LIMIT
FLAG
DELAY
V
OUT
3 FLG
GND
IC552 : R5523N001A-TR-F
High side switch IC
IC551 : ISP1760BE
Embedded hi-speed USB host controller
ISP1760BE
37 to 39, 41 to 43,
45 to 47, 49, 51,
52, 54, 56 to 58,
60 to 62, 64 to 66,
68 to 70, 72 to 74,
76 to 78, 80
82, 84, 86, 87,
89, 91, to 93,
95 to 98,
100 to 103, 105
SUSPEND/
WAKEUP_N
BAT_ON_N
REG1V8
REG3V3
REF5V
GND(OSC)
GNDA
GNDC
GNDD
GNDA
VCC(5V0)
RESET_N
CLKIN
XTAL1
XTAL2
VCC(I/O)
119
122
17
106
107
108
112
114
116
11
12
10, 40, 48, 59, 67,
75, 83, 94, 104, 115
16-bit
or
32-bit
13
30 MHz
60 MHz
110
5, 50,
85, 118
4, 17, 24
31, 123
53, 88, 121
14, 36, 44, 55, 63,
71, 79, 90, 99, 109
004aaa435
6, 7
9
2
8
16 15 20 19 18 21 127 23 22 27 26 25 28 128 30 29 34 33 32 35 1
GLOBAL CONTROL
AND POWER
MANAGEMENT
HC PAYLOAD
MEMORY (60 kB)
HC PTD MEMORY
(3 kB)
RISC PROCESSOR
INTERFAC:
A[17:1]
DATA [15:0]/DATA [31:0]
GENERIC PR
OCESSOR B
US
MEMORY
MANAGEMENT
UNIT
+
INTERRUPT
CONTROL
+
SLAVE DMA
CONTROLLER
+
HARDWARE
CONFIGURATION
REGISTERS
5 V-TO-1.8 V
VOLTAGE
REGULATOR
5 V-TO-3.3 V
VOLTAGE
REGULATOR
HI-SPEED
USB ATX3
DIGITAL
AND ANALOG
OVERCURRENT
DETECTION
PIE
USB HIGH-SPEED DATA PATH
EHCI AND
OPERATIONAL
REGISTERS
TRANSACTION
TRANSLATOR
AND RAM
MEMORY
ARBITER
AND FIFO
PLL
POWER-ON RESET
AND VBAT ON
OC3_N
PSW3_N
DP3
GND
(RREF3)
RREF3 DM3
USB FULL-SPEED AND LOW-SPEED DATA PATH
PORT ROUTING CONTROL LOGIC + HOST AND HUB PORT STATUS
PSW2_N
OC2_N
PSW1_N
OC1_N
GNDA
HI-SPEED
USB ATX2
DP2
GND
(RREF2)
RREF2 DM2
GNDA
HI-SPEED
USB ATX1
DP1
GND
(RREF1)
RREF1 DM1
DACK
IRQ
WR_N
RD_N
CS_N
DWEQ
IC553 : LAN9217-MT
Digital IC
System Memory
System Memory
System
Peripherals
External
PHY
Magnetics
Magnetics
LEDS/
GPIO
EEPROM
(Optional)
Embedded
Microprocessor/
Microcontroller
Optional
MII
25MHz
XTAL
Optional
Ethernet
LAN9217
USB HOST
NETWORK (LAN)
No replacement part available.
To GUI 1/2
NETWORK
to OPERATION (5)_W4407
Page 130 K5