background image

HTR-5890

38

RAMA15
RAMA16
RAMA17

VDD1

/CS

SO

SI

SCK

/IC

SDWCK

SDBCK

SDI7
SDI6
SDI5
SDI4
SDI3
SDI2
SDI1
SDI0

VDD2

81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100

RAMD5
RAMD4
RAMD3
RAMD2
RAMD1
RAMD0
VDD1
IOPORT19
IOPORT18
IOPORT17
IOPORT16
SDO7
SDO6
SDO5
SDO4
SDO3
SDO2
SDO1
SDO0
VSS

45
44
43

RAMA12
RAMA13
RAMA14

78
79
80

RAMD8
RAMD7
RAMD6

48
47
46

VSS

RAMA11

76
77

VDD2
RAMD9

50
49

42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26

VSS

XO

XI

IOPOR

T0

IOPOR

T1

IOPOR

T2

IOPOR

T3

IOPOR

T4

IOPOR

T5

IOPOR

T6

IOPOR

T7

A

VSS

CPO

A

VDD

VDD1

(NC)

IOPOR

T8

IOPOR

T9

IOPOR

T10

IOPOR

T11

IOPOR

T12

IOPOR

T13

IOPOR

T14

IOPOR

T15

VDD2

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

VDD2

RAMA10

RAMA9

RAMA3

RAMA4

RAMA2

RAMA5

VDD1

RAMA1

RAMA6

RAMA0

RAMA7

RAMA8

RASN

RAMOEN

RAMWEN

CASN

RAMD15

RAMD14

RAMD13

VDD1

RAMD12

RAMD11

RAMD10

VSS

75

74

73

72

71

70

69

68

67

66

65

64

63

62

61

60

59

58

57

56

55

54

53

52

51

MICROPROCESSOR

INTERFACE

EXTERNAL RAM

INTERFACE

CONTROL REGISTER

SDBCK

O

MPLO

A

D

/CS

SO

SI

SCK

IOPOR

T19~0

CASN

RASN

RAMWEN

RAMOEN

SDO0

SDI0
SDI1
SDI2
SDI3
SDI4
SDI5
SDI6
SDI7

SDBCK

SDWCK

XO

XI

CPO

SDI  INTERF

A

C

E

SDO1
SDO2
SDO3
SDO4
SDO5
SDO6
SDO7

32 bit DSP Core

PLL

DSP INTERNAL

OPERATING CLOCK

CK (30.72~40.96MHz)

COEFFICIENT

RAM

16 bit 

1024

 word

PROGRAM

RAM

50 bit 

1024

 word

ADDRESS

RAM

17 bit 

256

 word

CONTROL

SIGNALS

RAMD15~0

RAMA17~0

BCK

OP

SD

WCK

O

WCK

OP

OV

F

END

D

ATA

 R

A

M

32 bit 

1024

 word

SDO  INTERF

A

C

E

ZER

OF7R-0L

IC516, 518: YSS930-SZ (DSP P.C.B.)
DSP

IC516, 518: YSS930-SZ (DSP P.C.B.)
DSP

No.

Name

I/O

Function

1

VSS

-

Digital ground terminal

2

XO

O

Terminal for connecting crystal oscillator

3

XI

I

Terminal for connecting crystal oscillator 

 (12.288 〜 15.0MHz)

4

IOPORT0

I+/O

General purpose input/output terminal, SDO0 Lch zero-flag output terminal, input/output terminal for branching program conditions

5

IOPORT1

I+/O

General purpose input/output terminal, SDO0 Rch zero-flag output terminal, input/output terminal for branching program conditions

6

IOPORT2

I+/O

General purpose input/output terminal, SDO1 Lch zero-flag output terminal, input/output terminal for branching program conditions

7

IOPORT3

I+/O

General purpose input/output terminal, SDO1 Rch zero-flag output terminal, input/output terminal for branching program conditions

8

IOPORT4

I+/O

General purpose input/output terminal, SDO2 Lch zero-flag output terminal, input/output terminal for branching program conditions

9

IOPORT5

I+/O

General purpose input/output terminal, SDO2 Rch zero-flag output terminal, input/output terminal for branching program conditions

10

IOPORT6

I+/O

General purpose input/output terminal, SDO3 Lch zero-flag output terminal, input/output terminal for branching program conditions

11

IOPORT7

I+/O

General purpose input/output terminal, SDO3 Rch zero-flag output terminal, input/output terminal for branching program conditions

12

AVSS

-

Analog ground terminal (for PLL)

13

CPO

A

Terminal for connecting PLL filter

14

AVDD

-

+2.5V digital power supply (for PLL)

15

VDD1

-

+3.3V digital power supply (for input/output terminal)

16

(NC)

-

(Unconnected)

17

IOPORT8

I+/O

General purpose input/output terminal, SD04 Lch zero-flag output terminal

18

IOPORT9

I+/O

General purpose input/output terminal, SD04 Rch zero-flag output terminal

19

IOPORT10

I+/O

General purpose input/output terminal, SD05 Lch zero-flag output terminal

20

IOPORT11

I+/O

General purpose input/output terminal, SD05 Rch zero-flag output terminal

21

IOPORT12

I+/O

General purpose input/output terminal, SD06 Lch zero-flag output terminal, input terminal 0 for chip address setting

22

IOPORT13

I+/O

General purpose input/output terminal, SD06 Rch zero-flag output terminal, input terminal 1 for chip address setting

23

IOPORT14

I+/O

General purpose input/output terminal, SD07 Lch zero-flag output terminal, input terminal 2 for chip address setting

24

IOPORT15

I+/O

General purpose input/output terminal, SD07 Rch zero-flag output terminal, input terminal 3 for chip address setting

25

VDD2

-

+2.5V digital power supply (for internal circuit)

26

VSS

-

Digital ground terminal

27

SDO0

O

PCM output terminal

28

SDO1

O

PCM output terminal

29

SDO2

O

PCM output terminal

30

SDO3

O

PCM output terminal

31

SDO4

O

PCM output terminal

32

SDO5

O

PCM output terminal

33

SDO6

O

PCM output terminal

34

SDO7

O

PCM output terminal

35

IOPORT16

I+/O

General purpose input/output terminal, overflow detect output terminal

36

IOPORT17

I+/O

General purpose input/output terminal, program end detect output terminal

37

IOPORT18

I+/O

General purpose input/output terminal, 64fs clock output terminal

38

IOPORT19

I+/O

General purpose input/output terminal, fs clock output terminal

39

VDD1

-

+3.3V digital power supply (for input/output terminal)

40

RAMD0

I+/O

Data input/output terminal 0 for external memory

41

RAMD1

I+/O

Data input/output terminal 1 for external memory

42

RAMD2

I+/O

Data input/output terminal 2 for external memory

43

RAMD3

I+/O

Data input/output terminal 3 for external memory

44

RAMD4

I+/O

Data input/output terminal 4 for external memory

45

RAMD5

I+/O

Data input/output terminal 5 for external memory

46

RAMD6

I+/O

Data input/output terminal 6 for external memory

47

RAMD7

I+/O

Data input/output terminal 7 for external memory

48

RAMD8

I+/O

Data input/output terminal 8 for external memory

49

RAMD9

I+/O

Data input/output terminal 9 for external memory

50

VDD2

-

+2.5V digital power supply (for internal circuit)

51

VSS

-

Digital ground terminal

52

RAMD10

I+/O

Data input/output terminal 10 for external memory

53

RAMD11

I+/O

Data input/output terminal 11 for external memory

54

RAMD12

I+/O

Data input/output terminal 12 for external memory

55

VDD1

-

+3.3V digital power supply (for input/output terminal)

56

RAMD13

I+/O

Data input/output terminal 13 for external memory

Summary of Contents for htr-5890

Page 1: ...curate and applicable to the unit s indicated on the cover The research engineering and service departments of YAMAHA are continually striving to improve YAMAHA products Modifications are therefore inevitable and specifications are subject to change without notice or obligation to retrofit Should any discrepancy appear to exist please contact the distributor s Service Division WARNING Static disch...

Page 2: ...ce should be equivalent to 1500 ohms shunted by 0 15µF CAUTION F1 F2 FOR CONTINUED PROTECTION AGAINST RISK OF FIRE REPLACE ONLY WITH SAME TYPE 10A 125V FUSE CAUTION F1 F2 REPLACE WITH SAME TYPE 10A 125V FUSE ATTENTION F1 F2 UTILISER UN FUSIBLE DE RECHANGE DE MEME TYPE DE 10A 125V Leakage current must not exceed 0 5mA Be sure to test for leakage with the AC plug in both polarities About Lead Free S...

Page 3: ...HTR 5890 3 HTR 5890 FRONT PANEL REMOTE CONTROL PANEL ...

Page 4: ...HTR 5890 4 HTR 5890 A model REAR PANELS U C models ...

Page 5: ...ME 1 0 5 0 0 1 1 0 5 0 0 1 1 0 5 0 0 1 s REV DLY 0 250 1 0 250 1 0 250 1 ms REV LEVEL 0 100 1 0 100 1 0 100 1 PANORAMA OFF OFF ON DIMENSION 0 STD 3 3 1 CT WIDTH 0 0 7 1 C IMAGE 0 0 5 0 1 DIALG LIFT 0 5 1 0 5 1 0 5 1 PLⅡ PLⅡx PLⅡ PLⅡx PLⅡ PLⅡx DIMENSIONS 7ch Stereo Parameter Unit CT LEVEL 0 100 1 SL LEVEL 0 100 1 SR LEVEL 0 100 1 SB LEVEL 0 100 1 PL LEVEL 0 100 1 PR LEVEL 0 100 1 Video Section Vide...

Page 6: ... feet 1 0 to 80 feet 0 5 feet step feet SB L 7 0 feet 1 0 to 80 feet 0 5 feet step feet SB R 7 0 feet 1 0 to 80 feet 0 5 feet step feet SWFR 10 0 feet 1 0 to 80 feet 0 5 feet step feet PRESENCE L 10 0 feet 1 0 to 80 feet 0 5 feet step feet PRESENCE R 10 0 feet 1 0 to 80 feet 0 5 feet step D GRAPHIC EQ Channel L L R CT SR L R SB L R PRES L R 63 Hz 0 dB 6 dB 0 5 dB step 160 Hz 0 dB 6 dB 0 5 dB step ...

Page 7: ...UT SET 1 6ch 8ch 6ch 6 ch 8 ch 2 8CH INPUT FRONT DVD 3 CENTER to CENTER CENTER FRONT 4 SWFR to SWFR SWFR FRONT 5 SL SR SL SR SL SR FRONT 4 OPTION MENU A DISPLAY SET DIMMER 0 4 to 0 1 step OSD SHIFT 0 0 5 1 step GRAY BACK AUTO AUTO OFF V CONV ON OFF ON CMPNT OSD ON OFF ON B MEMORY GUARD OFF OFF ON C PARAM INI PARAM INIT D SP IMP SET 8 ohms 8 ohms 6 ohms E ZONE SET SP B SET FRONT FRONT ZONE B F ZONE...

Page 8: ...SION P C B 0 VIDEO 8 P C B A VIDEO 7 P C B B VIDEO 3 P C B C VIDEO 5 P C B D VIDEO 6 P C B E VIDEO 2 P C B F VIDEO 1 P C B G MAIN 2 P C B H DSP P C B I FUNCTION P C B J MAIN 4 P C B K POWER 1 P C B L POWER 3 P C B M OPERATION 7 P C B N OPERATION 5 P C B O OPERATION 2 P C B P OPERATION 4 P C B Q OPERATION 8 P C B R OPERATION 6 P C B S OPERATION 1 P C B T OPERATION 3 P C B Q S R T INTERNAL VIEW ...

Page 9: ...s numbered Disconnect the power cable from the AC outlet Fig 1 1 Removal of Top Cover a Remove 2 screws 1 4 screws 2 and 5 screws 3 Fig 1 b Slide the Top Cover rearward to remove it Fig 1 2 Removal of Front Panel Unit a Remove 9 screws 4 and then slide the Front Panel Unit forward Fig 1 b Remove CB25 CB505 CB509 CB512 CB861 CB863 and then remove the Front Panel Unit Fig 2 Fig 2 ...

Page 10: ...nd then remove the Bracket Fig 4 c Remove 1 screw 7 Fig 4 d Remove 8 screws 8 Fig 5 e Remove CB501 CB503 CB505 Fig 3 f Remove the DSP P C B and Shield Case upward Fig 4 4 Removal of VIDEO 2 P C B a Remove 1 screw 9 Fig 4 b Remove CB554 CB555 and CB558 Fig 3 c Remove the VIDEO 2 P C B which is connected directly to the lower P C B with connectors Fig 4 CB503 CB501 CB505 CB504 CB555 CB558 CB554 Fig ...

Page 11: ...2 OPERATION 1 P C B CB852 MF115500 15P 500mm When connecting the flat cable use care for the polarity 5 Removal of VIDEO 1 3 5 8 FUNCTION CONVERSION P C B s and Tuner a Remove 26 screws 0 Fig 5 b Remove VIDEO 1 3 5 8 FUNCTION CONVERSION P C B s and Tuner FUNCTION P C B VIDEO 2 P C B VIDEO 3 P C B CONVERSION P C B VIDEO 5 P C B VIDEO 1 P C B Ground Point Ground Point Earth lead wire In this unit th...

Page 12: ...vets D and then remove the Duct Fig 8 b Remove 4 screws E and 4 screws F Fig 8 c Remove the Amp Unit Fig 8 When checking the Amp Unit Put the Amp Unit together with the heat sink upright on the art base and check them Fig 9 Reconnect all cables connectors that have been disconnected Be sure to use the extension cable for servicing for the following section FUNCTION P C B CB507 POWER 1 P C B CB22 M...

Page 13: ...below 3 Turn on the power to the unit 4 To connect the line click the CONNECT button or the COM menu then click the CONNECT After connecting the Connected message is displayed in the status bar 5 Click the File Change button and then select the file to be loaded To start loading click the Program Macro button CAUTION Never disconnect the power cable of the unit while loading the firmware or the fl...

Page 14: ...OUND LR MUTE 7 SURROUND LR NONE 6 EXTERNAL INPUT 1 6CH INPUT_6OHMS 2 6CH INPUT_8OHMS 3 8CH INPUT_6OHMS 4 8CH INPUT_8OHMS 7 MIC CHECK MIC CHECK 8 EFFECT OFF 1 VFD CHECK Initial display DISPLAY CHECK 2 VFD DISP OFF All segments OFF 3 VFD DISP ALL All segments ON 100 4 VFD DIMMER All segments ON 50 5 CHECKED PATTERN ON in lattice 9 MANUAL TEST 1 TEST ALL 2 TEST FRONT L 3 TEST CENTER 4 TEST FRONT R 5 ...

Page 15: ...5 Byte 4 CS 2 5 Byte 5 CS 3 5 Byte 6 CS 4 5 Byte 7 CS 5 4 Byte 8 BS1 5 Byte 9 BS2 5 Byte 10 BS3 5 Byte 11 BS4 5 Byte 12 BS5 5 Byte 13 BS6 5 Byte 14 BS7 2 Byte 15 TI1 5 Byte 16 TI2 1 Byte 17 MTT 5 Byte 15 DSP RAM CHECK 1 YSS930 BUS CHECK 2 SECOND DECODER BUS CHECK 16 PROTECTION SET Not applied to this model 17 SOFT SW 1 SW MODE 2 MODEL SETTING 3 TUNER DESTINATION 4 TUNER EXIST 5 RDS EXIST 6 ZONE 2 ...

Page 16: ...he STANDBY ON key of the main unit or the STANDBY key of the remote controller Cause An excessive current flowed through the power amplifier Turning on the power without correcting the abnormality will cause the protection function to work immediately and the power supply will instantly be shut off Note Applying the power to a unit without correcting the abnormality can be dangerous and cause addi...

Page 17: ...of the startup screen appears on the superimposed screen and the function at work is indicated on the FL indicator The contents displayed during the function operation are described in the later section on details of functions History of protection function When the protection function has worked its history is stored in memory with a backup Even if no abnormality is noted while servicing the unit...

Page 18: ... the input mode key of the main unit Details of DIAG menu With full bit output specified in some modes it is possible to execute 0dBFS output without head margin in each channel 1 DA601 YSS930 This function is for YSS930 only Main DSP of YSS930 is selected for FRONT output Using the sub menu it is possible to select 0dB output level or full bit output YSS 0dB The signal is output including the hea...

Page 19: ...380 AD L R SBL SBR SWL SWR ReL ReR L R SL SR SL SR DIR L R CL CR PL PR SBL SBR or PL PR SWL SWR CL CR PL PR L R L R L R 4Mbit DRAM DA601 YSS930 ANALOG Shaded items not used in this example 2 BYPASS ANALOG BYPASS Reference data INPUT DVD ANALOG SUBWOOFER 50Hz Others 1kHz Input level Volume SPEAKER OUTPUT SUBWOOFER FRONT L R CENTER SURROUND L R SURROUND BACK OUTPUT Both ch 20 dBm 6 5 dB 13 5 dBm 13 ...

Page 20: ...ASS Reference data INPUT DVD ANALOG SUBWOOFER 50Hz Others 1kHz ANALOG BYPASS DSP BYPASS ANALOG 4Mbit DRAM SBL SBR C LFE SL SR TI DA601 YSS930 D1 YSS930 D0 LC89057 Analog Digital A D DIR DECODE DSP POST PROCESSING DSP POST PROCESSING DSP AK5380 AD L R SBL SBR SWL SWR ReL ReR L R SL SR SL SR CL CR PL PR SBL SBR or PL PR SWL SWR CL CR PL PR L R L R L R DIR L R Shaded items not used in this example DS...

Page 21: ...P POST PROCESSING DSP AK5380 AD L R SBL SBR SWL SWR ReL ReR L R SL SR SL SR DIR L R CL CR PL PR SBL SBR or PL PR SWL SWR CL CR PL PR L R L R L R 4Mbit DRAM POST PROCESSING DSP RAM THROUGH ANALOG Shaded items not used in this example Input level Volume SPEAKER OUTPUT SUBWOOFER FRONT L R CENTER SURROUND L R SURROUND BACK OUTPUT Both ch 20 dBm 6 5 dB 13 5 dBm 13 5 dBm 13 5 dBm 13 5 dBm 7 0 dBm Input ...

Page 22: ...CODE DSP POST PROCESSING DSP AK5380 AD L R SBL SBR SWL SWR ReL ReR L R SL SR SL SR DIR L R CL CR PL PR SBL SBR or PL PR SWL SWR CL CR PL PR L R L R L R 4Mbit DRAM POST PROCESSING DSP PRO LOGIC NEO 6 ANALOG Shaded items not used in this example Neo 6 Reference data INPUT DVD ANALOG SUBWOOFER 50Hz Others 1kHz Input level Volume SPEAKER OUTPUT SUBWOOFER FRONT L R CENTER SURROUND L R SURROUND BACK OUT...

Page 23: ...E NONE LARGE LARGE SWFR 3 LFE BASS FRONT SMALL SMALL LARGE MAIN 4 PRESS MIX 5CH LARGE LARGE LARGE SWFR 5 SURROUND BACK MUTE LARGE LARGE LARGE SWFR 6 SURROUND MUTE LARGE LARGE LARGE SWFR 7 SURROUND NONE LARGE NONE LARGE SWFR NONE This mode is used with no center speaker The center content is reduced by 3dB and distributed to FRONT L R Sub menu Input level Volume SPEAKER OUTPUT SUBWOOFER FRONT L R C...

Page 24: ... 0 dBm 3 8CH_INPUT_6ohms Both ch 20 dBm 6 5 dB 13 5 dBm 13 5 dBm 13 5 dBm 13 5 dBm 1 0 dBm 4 8CH_INPUT_8ohms Both ch 20 dBm 6 5 dB 13 5 dBm 13 5 dBm 13 5 dBm 13 5 dBm 1 0 dBm 6 EXTERNAL INPUT It is possible to select the 6ch 8ch input and 6_ 8_ by using the SUB menu Reference data INPUT MULTI CH INPUT SUBWOOFER 50Hz Others 1kHz 7 MIC CHECK The signals input through the microphone are output via A ...

Page 25: ...he second row from the top are shorted 8 EFFECT OFF DISPLAY CHECK This program is used to check the FL display section The display condition varies as shown below according to the sub menu operation The signals are processed using EFFECT OFF The L R signal is output using ANALOG MAIN BYPASS The video signal internal external synchronization switching is controlled by the microprocessor When the in...

Page 26: ...r the test command is transmitted RxD RTS CTS TxD 1 2 3 6 7 8 9 4 5 9 MANUAL TEST The noise generator with a built in DSP outputs the test noise through the channels specified by the sub menu The noise frequency for LFE is 35 to 250 Hz Other than that the center frequency is 800Hz TEST ALL TEST FRONT L TEST CENTER TEST FRONT R TEST SURROUND R TEST SURROUND BACK R Noise is output from all channels ...

Page 27: ... 50 2 90 1 90 10 3 95 1 95 10 A C E 4 98 1 98 10 5 107 9 108 00 6 88 1 88 10 7 106 1 106 10 8 107 9 108 00 STATION AM FACTORY PRESET DATA kHz PAGE NO U C A 1 630 630 2 1080 1080 3 1440 1440 B D 4 530 531 5 1710 1611 6 900 900 7 1350 1350 8 1400 1404 PRESET STATIONS 12 AD DATA CHECK FAN TEST This menu is used to display the A D conversion value of the main CPU which detects panel keys of the main u...

Page 28: ...XT8CH INPUT Other than those LC1 L LC1 L 157 on the above LC2 L LC2 H 163 K0 K1 Panel key of main unit A D of the key fails to function properly when the standard value is deviated by 4 In this case check the constant of partial pressure resistor solder condition etc Refer to table below Reference voltage 5V 100 Display K0 K1 00 2 PRESET TUNING 10 2 PRESET TUNING SPEAKERS A 20 2 PRESET TUNING SPEA...

Page 29: ...4 IF STATUS Input function status Using the sub menu the status data is displayed one after another in the hexadecimal notation During signal processing the status before execution of this menu is maintained Numeric values in the figure example are for reference 1st byte Digital input output setting value Upper 4 bits REC OUT selected lower 4 bits INPUT selected IS1 2 Internal status Indicates the...

Page 30: ...ag 60 AAC C0 Dolby Digital C1 D D Karaoke C4 D D 6 1 D D EX Display 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D Audio Code MULTI MONO 1 1 1 0 2 0 3 0 2 1 3 1 2 2 3 2 2 3 3 3 OVER 6 1 MULTI PCE Unknown 5th byte Signal processing status information 2 With digital signals other than 32kHz 44 1kHz and 48kHz through processing method is used for reproducible signals bit7 MUTE request bit3 bit6 Red dts fl...

Page 31: ...d possibility is that there is a defective part or poor connection of the microprocessor DA601 SDRAM NoEr Booting of DA601 has been completed properly 17 SOFT SW This menu is used to switch the function settings on P C B through the software so as to activate the product The operation mode can be changed by selecting the sub menu and then using the STRAIGHT key With SOFT selected for the SW mode t...

Page 32: ... mode Type 0 Type 1 Model type 0 0 HTR 5890 V1500 1 Model type Version Release 1 figure Main 2 figures DSP 2 figures Communication 1 figure Boot manufacturer 1 figure Boot 232C 1 figure OPE DSP Version Main 2 figures DSP 2 figures Checksum A All area P Program area Checksum 2 Boot 232C M Boot manufacturer Check of port setting for judging microprocessor function Display of AAC function detection p...

Page 33: ... Lch R320 FRONT Rch R325 CENTER R326 SURROUND Lch R327 SURROUND Rch R321 SURROUND BACK Lch R322 SURROUND BACK Rch are between 0 1mV and 10 0mV If it exceeds 10 0mV open cutoff R291 FRONT Lch R292 FRONT Rch R295 CENTER R296 SURROUND Lch R297 SURROUND Rch R293 SURROUND BACK Lch R294 SURROUND BACK Rch and reconfirm the voltage Attention If the idle current exceeds 10 0mV after an amplifier repair fir...

Page 34: ...No 65 F2 64 NX 63 NP 62 NP 61 P37 60 P36 59 P35 58 P34 57 P33 56 P32 55 P31 54 P30 53 P29 52 P28 51 P27 50 P26 49 P25 48 P24 47 P23 46 P22 45 P21 44 P20 43 P19 42 P18 41 P17 40 P16 39 P15 38 P14 37 P13 33 P9 32 P8 31 P7 30 P6 29 P5 28 P4 27 P3 26 P2 25 P1 24 NC 23 NC 22 NC 21 17G 20 16G 19 15G 18 14G 17 13G 16 12G 15 11G 14 10G 13 9G 12 8G 11 7G 10 6G 9 5G 8 4G 7 3G 6 2G 5 1G 4 NP 3 NP 36 P12 35 P...

Page 35: ...ble digital data Validity flag input pin for modulation 10 RX6 UI Is TTL compatible digital data User data input pin for modulation 11 DVDD PLL digital power supply 12 DGND PLL digital GND 13 LPF O PLL loop filter connection pin 14 ACDD PLL analog power supply 15 AGND PLL analog GND 16 RMCK O R system clock output pin 256fs 512fs XIN VCO 17 RBCK O I R bit clock input output pin 18 DGND Digital GND...

Page 36: ...k Input in SPI slave state 34 VSS GND Ground 35 CVDD S 1 2V power supply 36 CLKR1 IOZ McBSP1 Reception clock 37 DR1 I McBSP1 Reception data 38 FSR1 IOZ McBSP1 Reception Frame Sync 39 VSS GND Ground 40 CVDD S 1 2V power supply No Name I O Function 41 SCL0 IOZ 12C0 clock 42 SDA0 IOZ 12C0 data 43 CVDD S 1 2V power supply 44 DVDD S 3 3V power supply 45 VSS GND Ground 46 CVDD S 1 2V power supply 47 DVD...

Page 37: ...ion data 4 148 VSS GND Ground 149 CVDD S 1 2V power supply 150 AXR1 5 IOZ McASP1 transmission reception data 5 151 AXR1 6 IOZ McASP1 transmission reception data 6 152 AXRO 8 AXR1 7 IOZ McASP1 transmission reception data 7 153 ACLKX1 IOZ McASP1 transmission BCLK 154 AMUTE1 OZ McASP1 MUTE output 155 AFSX1 IOZ McASP1 transmission LRCLK 156 GP0 0 IOZ General purpose I O0 port 0 SPI ready signal output...

Page 38: ...Rch zero flag output terminal input output terminal for branching program conditions 12 AVSS Analog ground terminal for PLL 13 CPO A Terminal for connecting PLL filter 14 AVDD 2 5V digital power supply for PLL 15 VDD1 3 3V digital power supply for input output terminal 16 NC Unconnected 17 IOPORT8 I O General purpose input output terminal SD04 Lch zero flag output terminal 18 IOPORT9 I O General p...

Page 39: ...nal memory 73 RAMA9 O Address output terminal 9 for external memory 74 RAMA10 O Address output terminal 10 for external memory 75 VDD2 2 5V digital power supply for internal circuit 76 VSS Digital ground terminal 77 RAMA11 O Address output terminal 11 for external memory 78 RAMA12 O Address output terminal 12 for external memory 79 RAMA13 O Address output terminal 13 for external memory 80 RAMA14 ...

Page 40: ... SO O OL OL 2 P95 ANEX0 CLK4 CLK4 RTS 232C RTS YDC clock SCK I O OL OL 3 P94 DA1 TB4in CTS4 RTS4 SS4 P94 CTS 232C CTS I I I OL 4 P93 DA0 TB3in CTS3 RTS3 SS3 DA0 FAN Fan control DA O I I OL 5 P92 TB2in TxD3 SDA3 SRxD3 TxD3 SDTN None audio TX data SO SO OL OL 6 P91 TB1in RxD3 SCL3 STxD3 RxD3 RXRDS RDS RX data Freq data R ver SI SI I OL 7 P90 TB0in CLK3 CLK3 SCKN None audio serial clock SCK SCK OL OL...

Page 41: ... D15 D15 External ROM data 103 P16 D14 INT4 D14 D14 External ROM data 104 P15 D13 INT3 D13 D13 External ROM data 105 P14 D12 D12 D12 External ROM data 106 P13 D11 D11 D11 External ROM data 107 P12 D10 D10 D10 External ROM data 108 P11 D9 D9 D9 External ROM data 109 P10 D8 D8 D8 External ROM data 110 P07 D7 D7 D7 External ROM data 111 P06 D6 D6 D6 External ROM data 112 P05 D5 D5 D5 External ROM dat...

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