RX-V395/RDS HTR5130/RDS
RX-V395/RDS
HTR5130/RDS
21
No.
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
VOCM
VOCP
VORM
VORP
AVDD
DVDD
D7
D6
D5
D4
D3
D2
D1
D0
A0
A1
A2
A3
A4
DGND
DGND
A5
A6
A7
A12
A14
/WE
A13
A8
A9
A11
/OE
A10
/CE
XO
XI
SYNCI
DVDD
SYNCO
/IC
LRS
/CSS
BCK
WCK
AO
AO
AO
AO
A—
—
I/Ot
I/Ot
I/Ot
I/Ot
I/Ot
I/Ot
I/Ot
I/Ot
O
O
O
O
O
—
—
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
It
—
O
Ics
O
O
Its
Its
C channel operation amplifier, connected to (–) terminal
C channel operation amplifier, connected to (+) terminal
R channel operation amplifier, connected to (–) terminal
R channel operation amplifier, connected to (+) terminal
+5V power supply (multiplying DAC section)
+5V power supply (digital section)
External delay RAM data terminal
External delay RAM data terminal
External delay RAM data terminal
External delay RAM data terminal
External delay RAM data terminal
External delay RAM data terminal
External delay RAM data terminal
External delay RAM data terminal
External data RAM address terminal
External data RAM address terminal
External data RAM address terminal
External data RAM address terminal
External data RAM address terminal
Ground (digital section)
Ground (digital section)
External data RAM address terminal
External data RAM address terminal
External data RAM address terminal
External data RAM address terminal
External data RAM address terminal
External delay RAM write enable terminal
External dalay RAM address terminal
External dalay RAM address terminal
External dalay RAM address terminal
External dalay RAM address terminal
External dalay RAM output enable terminal
External dalay RAM address terminal
External delay RAM chip enable terminal
Crystal oscillator connecting terminal
Crystal oscillator connecting terminal
Test terminal for system synchronization, normally connected to DVDD
+5V power supply (digital section)
Test terminal for system synchronization, normally unconnected
Initial clear terminal (Power ON resetting is necessary)
External automatic input balance terminal, (normally unconnected)
External automatic input balance terminal, (normally unconnected)
Bit clock for parameter data input
Word clock for parameter data input
Note : Letters used in the above I/O column represent as follows.
I : Input terminal O : Output terminal t : TTL level
c : CMOS level s : Schmidt input A : Analog terminal
I/O
Function
Name
IC466 : YSS203B-F
Digital Dolby Pro Logic Decoder with Auto Input Balance