Yamaha HTR-5065, Service Manual

Page: 62 / 134

No.
Function Name
(P.C.B.)
I/O Detail of Function
51 EM_D[1] IO EMIF data b u s [lower 16-bits]
52 EM_D[0] IO EMIF data b u s [lower 16-bits]
53 CVDD
54 VSS
55 EM_D[15] IO EMIF data b u s [lower 16-bits]
56 EM_D[14] IO EMIF data b u s [lower 16-Bits]
57 CVDD
58 EM_D[13] IO EMIF data b u s [lower 16-Bits]
59 EM_D[12] IO EMIF data b u s [lower 16-Bits]
60 DVDD
61 EM_D[11] IO EMIF data b u s [lower 16-Bits]
62 VSS
63 EM_D[10] IO EMIF data b u s [lower 16-Bits]
64 EM_D[9] IO EMIF data b u s [lower 16-Bits]
65 CVDD
66 EM_D[8] IO EMIF data b u s [lower 16-bits]
67 EM_WE_DQM[1] O Write enable or byte enable for EM_D [15:8]
68 DVDD
69 VSS
70 EM_CLK O SDRAM clock
71 EM_CKE O SDRAM clock enable
72 VSS
73 DVDD
74 EM_A[11] O EMIF address b u s
75 EM_A[9] O EMIF address b u s
76 EM_A[8] O EMIF address b u s
77 CVDD
78 VSS
79 EM_A[7] O EMIF address b u s
80 EM_A[6] O EMIF address b u s
81 DVDD
82 VSS
83 EM_A[5] O EMIF address b u s
84 EM_A[4] O EMIF address b u s
85 CVDD
86 EM_A[3] O EMIF address b u s
87 VSS
88 EM_A[2] O EMIF address b u s
89 EM_A[1] O EMIF address b u s
90 CVDD
91 EM_A[0] O EMIF address b u s
92 DVDD
93 EM_A[10] O EMIF address b u s
94 EM_BA[1] O SDRAM bank address and asynchrono u s memory Low-Order address
95 VSS
96 EM_BA[0] O SDRAM bank address and asynchrono u s memory Low-Order address
97 EM_CS[0] O SDRAM chip select
98 EM_RAS O SDRAM row address strobe
99 VSS
100 EM_CS[2] O Asynchrono u s memory chip select
62
RX-V573/HTR-5065
RX-V573/HTR-5065