Yamaha HTR-3072, Service Manual

Page: 73 / 133

Pin No. Function Name (P.C.B.) I/O Detail of Function
128 DVDD
129 AHCLKR0/GP2[14]/BOOT[11] I/O McASP0 receive master clock
I BOOT[11]
130 ACLKR0/ECAP1/APWM1/GP2[15] I/O McASP0 receive bit clock
I/O Enhanced capture 1 input or auxiliary PWM 1 output
131 AFSR0/GP3[12] I/O McASP0 receive frame sync
132 AMUTE1/EPWMTZ/GP4[14] I/O McASP1 mute output
I/O eHRPWM0 trip zone input
I/O eHRPWM1 trip zone input
I/O eHRPWM2 trip zone input
133 RSV2 PWR Reserved. For proper device operation, this pin must be tied directly
to CVDD or left unconnected [do not connect to ground (VSS)].
134 USB0_VDDA12 PWR USB0 PHY 1.2-V LDO output for bypass cap
135 USB0_VDDA18 PWR USB0 PHY 1.8-V supply input
136 NC - -
137 USB0_DP A USB0 PHY data plus
138 USB0_DM A USB0 PHY data minus
139 NC - -
140 USB0_VDDA33 PWR USB0 PHY 3.3-V supply
141 PLL0_VDDA PWR PLL analog VDD (1.2-V filtered supply)
142 PLL0_VSSA GND PLL analog VSS (for filter)
143 OSCIN I Oscillator input
144 OSCVSS GND Oscillator ground (for filter only)
145 OSCOUT O Oscillator output
146 RESET I Device reset input
147 CVDD
148 RTC_XI I Low-frequency (32-kHz) oscillator receiver for real-time clock
149 RTC_CVDD PWR RTC module core power ( isolated from rest of chip CVDD)
150 TRST I JTAG test reset
151 DVDD
152 TMS I JTAG test mode select
153 TDI I JTAG test data input
154 CVDD
155 TCK I JTAG test clock
156 TDO O JTAG test data output
157 GP7[14] I/O General-Purpose IO signal
158 DVDD
159 CVDD
160 AHCLKX1/EPWM0B/GP3[14] I/O McASP1transmit master clock
I/O eHRPWM0 B output
161 CVDD
162 ACLKX1/EPWM0A/GP3[15] I/O McASP1transmit bit clock
I/O eHRPWM0 A output
163 AFSX1/EPWMSYNCI/EPWMSYNCO/GP4[10] I/O McASP1transmit frame sync
I/O Sync input to eHRPWM0 module or sync output to external PWM
164 DVDD
165 ACLKR1/ECAP2/APWM2/GP4[12] I/O McASP1receive bit clock
I/O Enhanced capture 2 input or auxiliary PWM 2 output
166 AFSR1/GP4[13] I/O McASP1receive frame sync
167 CVDD
168 AXR1[8]/EPWM1A/GP4[8] I/O McASP1 serial data
I/O eHRPWM1 A output (with high-resolution)
169 AXR1[7]/EPWM1B/GP4[7] I/O McASP1 serial data
I/O eHRPWM1 B output
170 AXR1[6]/EPWM2A/GP4[6] I/O McASP1 serial data
I/O eHRPWM2 A output (with high-resolution)
171 AXR1[5]/EPWM2B/GP4[5] I/O McASP1 serial data
I/O eHRPWM2 B output
172 DVDD
173 AXR1[4]/EQEP1B/GP4[4] I/O McASP1 serial data
I eQEP1B quadrature input
174 AXR1[3]/EQEP1A/GP4[3] I/O McASP1 serial data
I eQEP1A quadrature input
175 AXR1[2]/GP4[2] I/O McASP1 serial data
176 AXR1[1]/GP4[1] I/O McASP1 serial data
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RX-V385/HTR-3072
RX-V385/HTR-3072