Yamaha DVR-S200, Service Manual

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A B C D E F G H
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DVR-S200/NX-P200
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DVR-S200 BLOCK DIAGRAM (1/3)
/ ブロックダイアグラム
Host bus
Front-end back-end
interface ATAPI / host bus ext1 connector 1603
Front-end Back-end 1 ATARSTn 2 GND
signals signals 3 DD[7] 4 DD[8]
IDERST LDRRSTn LDRRSTn ATARSTn 5 DD[6] 6 DD[9]
Single Disc HD(0..7) SD_IN(0..7) 7 DD[5] 8 DD[10]
connector 1701 FERROR ERROR LDS DIOWn 9 DD[4] 10 DD[11]
FDACKn DACK UPA[1..3] LDS UDS DIORn 11 DD[3] 12 DD[12]
1 LOAD- LOAD- OPEN RA[0:8] FSTRMREQ FUR_SDREQ UPD[0..15] UDS UPA[0..2] DA[0..2] 13 DD[2] 14 DD[13]
2 LOAD+ LOAD+ CLOSE RD[0..15] INTJ SYNC MADDR[0..11] ALE IORDYn IDE_CS0n IDE_CS0n_A 15 DD[1] 16 DD[14]
3 OUTSW RRASJ FDSTROBEn DSTROBEn BA[0..1] RW IDE_CS1n IDE_CS1n_A 17 DD[0] 18 DD[15]
4 GND OUTSW RCASJ FDSTROBE DSTROBE MDATA[0..31] 19 GND 20 NC
5 INSW INSW RWEJ FDSTROBEnn NC MDQM[0..3] 21 NC 22 GND
6 SLED+ SLED+ SFOCUS ROEJ TXD RXDU SD_CLK Chip select assignment 23 DIOWn 24 GND
7 SLED- SLED- STRACK RXD TXDU MCASn Mode Non-encoded Encoded (provision) 25 DIORn 26 GND
8 DCMO- DCMO- SMOTOR F_RDYn H_RDYn MRASn HCS0n FLASH_CSn FLASH CSn UPD[0..15] DD[0..15] 27 IORDYn 28 NC
9 DCMO+ DCMO+ SSLEG MA[0..16] UDE_RDYn LDRRDYn MCS0n HCS1n FURORE_C FURORE_CSn 29 Pull to HIGH 30 GND
XSPDON MD[0..7] RFP RFP MWEn HCS2n MEDUSA_CSn MEDUSA_CSn 31 INTRQ 32 NC
MFSCSJ HCS3n IDECS0n IDECS0n 33 DA[1] 34 NC
MVREF2 MPSENJ HCS4n IDECS1n IDECS1n 35 DA[0] 36 DA[2]
MOCTL- MWRJ RXDU HCS5n NC HB_CS5n IORDYn 37 IDE_CS0n 38 IDE_CS1n
UDE command TXDU HCS6n NC HB_CS6n INTRQ 39 NC 40 GND
H_RDYn HCS7n NC HB_CS7n
CRSTJ LDRRDYn
HCS[0..4] ATAPI power Host bus ext2
connector 1605 connector 1602
Digital in 1 5V 1 5V
Reference voltages TXD connector 1600 HCS[0..7] 2 GND 2 GND
OPU VREF25 UDE command RXD (provision) HB_CS5n HB_CS5n_A - NC 3 3V3
connector 1700 MVREF2 F_RDYn DA_XCK 1 LRCLK2 ALE ALE_A - NC 4 12V
1 GND VREF25 MEVO UDE_RDYn 2 DA_XCK RW RW_A - NC 5 HB_CS5n_A
2 VS RFRP 3 GND - NC 6 RW_A
3 VCC IDERST 4 SCLK2 Interrupt assignment - NC 7 ALE_A
4 E LRCLK2 5 SDATA2 HIRQ0n MEDUSAINTn MEDUSAINTn - NC 8 GND
5 F A SCLK2 HIRQ1n INTRQ - NC 9 MEDUSAINTn
6 D
Photo detector
B E RFOUT Registers SCS UDE bitstream SDATA2 HIRQ2n FURINTn
7 A C F SDATA HD[0..7] UDE bitstream
8 B D SCLK FERROR ZiVA5 HIRQ[0..2]
9 C INTJ
10 RFOUT SAE ZIVA_ERROR
11 GND Laser control FEI ERROR ZIVA_DACK
12 CDMDI DVDMDI Servo TEI FDACK FDACKn DACK ZIVA_DSTROBE GPIO
13 GND CDMDI DFCT DSTROBEn
14 VR SSBAD STRMREQ FSTRMREQ LDRRSTn
UPA[1..3] UPA[4..22]
15 CDLD DVDLD DVDLDO MIRR INTRQ UPD[0..15]
16 DVDLD CDLD CDLDO FDSTROBE FDSTROBEn SD_IN[0..7]
17 GND Laser LDON FDSTROBEnn HCS[3..4] (GPIO provision) UPA[21]
18 VR ZIVA_SDREQ UPA[22]
19 VCC Channel RFO Secondary I2C ALE
20 DVDMDI (provision)
21 FOCUS+ FOCUS+ HCS[3] == SDA1 FLASH_CS0n
22 FOCUS- Coil control FOCUS- HCS[4] == SCL1
23 TRACK+ TRACK+ RFP Master I2C FLASH_CSn FLASH_CS1n
24 TRACK- TRACK- Primary I2C SDA0 I2C_DA
SCL0 I2C_CL
RW
Slave I2C UDS
(provision)
27M (provision) S_I2C_DA
S_I2C_CL
Diagnostic / E-link RXD1
GPIO console port TXD1
DIAGSELn
SYS_RSTn
ZK5 E-Link connector 1501
(software development only)
ZiVA5 Misc MUTE 1 GND 2 5V
JTAG TP SCART0 3 MEDUSA_CSn 4 5V
Service Karaoke TRST TDI DIAGSELn PSCAN_SWI 5 ALE 6 SYS_RSTn
connector 1101 connector 1604 TDO 7 UPA[2] 8 UPA[3]
1 TXD_SER 1 DA_BCK TDI Analog video VID_Y VID_COMP 9 UPD[15] 10 UPA[1]
2 DIAGSELn 2 12V TMS VID_U VID_C
UPA[1..3] LDS
11 UPD[13] 12 UPD[14]
3 RXD_SER TXD_SER 3 DA_LRCK TCK VID_V
UPD[0..15] UDS
13 UPD[11] 14 UPD[12]
4 NC RXD_SER 4 GND ALE
IORDYn
15 UPA[9] 16 UPD[10]
Power 5 GND 5 DAI_DATA Karaoke input Digital video VDATA[0..7] RW
MEDUSAINTn
17 UPD[8] 18 GND
connector 1900 6 NC 6 GND
MEDUSA_CSn
19 UPD[6] 20 UPD[7]
(provision) 7 5V 7 DA_XCK Digital audio VCLK 21 UPD[4] 22 UPD[5]
1 3V3 8 3V3 IEC958 23 UPD[2] 24 UPD[3]
2 3V3 3V3 25 UPD[0] 26 UPD[1]
3 5V 5V 27 MEDUSAINTn 28 IORDYn
4 GND 12V DA_XCK Audio I2S 29 LDS 30 UDS
5 GND DA_BCK DA_XCK 31 RW 32 GND
6 GND TXD1 DA_LRCK DA_BCK
7 12V RXD1 DIAGSELn DAI_DATA DA_LRCK
3V3 1V8 DAI_DATA SPDIF DA_DATA[0..3] 27M
Basic AV DSD Audio DSD DA_XCK 27M I2C_DA HDMI
connector 1500 connector 1400 or PCM DA_BCK I2C_CL connector
1 SCL0 1 GND DSD_PCM[0..7] DA_LRCK 1 GND Master I2C
2 SDA0 2 DA_XCK_IN DA_XCK_IN DSD_PCM[10..11] DA_DATA[1..3] 2 I2C_DA I2C_DA
3 PSCAN_SWI 3 GND 3 I2C_CL I2C_CL
4 SCART0 4 DSD_PCM[3] 4 GND
5 VGND Master I2C 5 GND ZIVA_SDREQ 5 27M
6 B_VID Primary I2C I2C_DA 6 DSD_PCM[2] / DA_DATA[3] Non-SACD 6 GND 27M
7 VGND SCL0 I2C_CL 7 GND provision 7 VDATA[0]
8 G_VID SDA0 8 DSD_PCM[5] DSD_PCM[0..7] UDE bitstream 8 GND
9 VGND Slave I2C 9 GND Furore2 9 VDATA[1]
10 R_VID S_I2C_DA 10 DSD_CPM[4] / DA_DATA[2] DA_DATA[0..3] FUR_SDREQ
FUR_27M
10 GND
11 VGND S_I2C_CL 11 GND 11 VDATA[2] VDATA[0..7]
12 Y_VID 12 DSD_PCM[1] DA_XCK DSTROBE ERROR 12 GND
13 VGND PSCAN_SWI 13 GND SYNC DACK
FUR_RSTn
13 VDATA[3]
14 C_VID SCART0 14 DSD_PCM[0] / DA_DATA[1] 14 GND
15 VGND MUTE 15 GND Master I2C SD_IN[0..7] 15 VDATA[4]
16 CVBS_VID G_VID 16 DSD_PCM[7] I2C_DA 16 GND Digital audio SPDIF
17 3V3 B_VID VID_Y 17 GND I2C_CL 17 VDATA[5]
18 3V3 R_VID VID_U 18 DSD_PCM[6]
UPA[1..3] IORDYn
18 GND
19 5V Y_VID VID_V 19 GND
UPD[0..15] FURINTn
19 VDATA[6] DA_XCK
20 12V C_VID VID_C 20 DA_XCK SPDIF RFP ALE
FURORE_CSn
20 GND Digital audio DA_BCK
21 12V CVBS_VID VID_CVBS 21 GND RW 21 VDATA[7] (provision) DA_LRCK
22 MUTE 22 I2C_CL INTRQ 22 GND DA_DATA1
23 GND DA_XCK 23 I2C_DA 23 DA_XCK
24 DA_BCK DA_BCK 24 GND FUR_AD[0..13] 24 GND HCS[3]
25 DA_DATA[0] DA_LRCK 25 DSD_PCM[10] / DA_DATA[0] Furore2 FUR_DQ[0..15] 25 DA_BCK
26 GND DA_DATA[0] 26 GND JTAG TP FUR_DQMH 26 GND
27 DA_XCK 27 DSD_PCM[11] / DAI_DATA FUR_TRST FUR_DQML 27 DA_DATA[1] / SPDIF
28 DA_LRCK SPDIF 28 HCS[4] FUR_TDO FUR_RASn 28 GND
39 GND 39 HCS[3] / SPDIF FUR_TDI FUR_CASn 39 DA_LRCK
30 SPDIF 30 INTRQ FUR_TMS FUR_WEn 30 HCS[3]
FUR_TCK FUR_CLK
Motor driver
BA6954FP
Tray driver circuit
V-to-I buffer
Front-end DVD
analog chip
ALi
SP3721A
MC34072
LM393D
Front-end DVD
controller
ALi
M5705
Reset circuit
Flash
2Mb
PLCC32
EDO-DRAM
256k x 16b
SOJ40
74LVC04
Mux
74LVC157
(provision)
Back-end DVD
processor
LSI Logic
ZiVA-5
SDRAM
2x TSOP54
(max 256Mb)
SDRAM
1x TSOP86
(provision)
Buffer / voltage
translation
74HCT541
(bypass provision)
Buffer / voltage
translation
74ALVC164245
Transparent
latch
3x 74LVC573
Buffer / voltage
translation
74HCT541
(bypass provision)
Flash
2x TSOP48
(max 64Mb)
Address
decoder
74LVC00
Reset
circuit
Back-end SACD
decoder
Philips Semi
Furore2
Analog buffer
SDRAM
TSOP54
64Mb
BCD
decoder
74LVC138
(provision)
NVRAM
64kb
27MHz crystal
oscillator
(provision)
Reset
circuit
Buffer / voltage
translation
74LVC827
(bypass provision)
Buffer
74LVC1G125
(bypass
provision)
Buffer / switch
74LVC1G125
(bypass provision)
Buffer / voltage
translation
(bypass provision)
Buffer / voltage
translation
(bypass provision)
Video filter
and
buffer
Voltage
regulator
Buffer /
impedance
matching
Crystal
13.5MHz
Oscillator
33.8688MHz
7709/7710
7701
7707
7705
1800
7801
7800
7807
7805
7300/7301
7302
7101
7603
7802
7702
7700/7703
7608
7605
7609
7200/3/4
7205
7201/7202
7511
7103
7401
7403
7206
7400
7402
7506
1100
DVD Module