Yamaha DSP-N600, Service Manual

Page: 66 / 142

RX-N600/RX-N600D/HTR-N5060/
DSP-N600
66
RX-N600/RX-N600D/
HTR-N5060/DSP-N600
IC610 : EP9301-CQ2 (NET P.C.B)
System on chip processor
Serial
Audio
Interfacce
(2) UARTs
w/
IrDA
(2) USB
Hosts
Boot
ROM
SRAM &
Flash I/F Unified
SDRAM I/F
Bus Bridge
Clocks &
Timers
Interrupts
& GPIO D-Cache
16KB
I-Cache
16KB
12 Channel DMA
MaverickKey
Processor Bus
Peripheral Bus
ARM920T
MMU
MEMORY AND STORAGE
COMMUNICA
TIONS POR
T
S
USER INTERF
A
CE
TM
Ethernet
MAC
PIN NO. Pin Name Signal Name I/O Type Function
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
CSn[7]
CSn[6]
CSn[3]
CSn[2]
CSn[1]
AD[25]
RVDD
RGND
AD[24]
SDCLK
AD[23]
CVDD
CGND
SDWEn
SDCSn[3]
SDCSn[2]
SDCSn[1]
SDCSn[0]
RVDD
RGND
RASn
CASn
DQMn[1]
DQMn[0]
AD[22]
AD[21]
RVDD
RGND
DA[15]
AD[7]
DA[14]
AD[6]
DA[13]
CVDD
CGND
AD[5]
DA[12]
AD[4]
DA[11]
AD[3] N_CS7
N_CS6
N_CS3
N_CS2
N_CS1
(NC)
+3.3DC
DGND
(NC)
SDCLK
(NC)
+1.8DC
DGND
N_SDWE
N_SDCS3
(NC)
(NC)
(NC)
+3.3DC
DGND
N_RAS
N_CAS
N_DQM1
N_DQM0
(NC)
A[21]
+3.3DC
DGND
D[15]
A[7]
D[14]
A[6]
D[13]
+1.8DC
DGND
A[5]
D[12]
A[4]
D[11]
A[3] O(PU)
O(PU)
O(PU)
O(PU)
O(PU)
O
Power
Ground
O
O
O
Power
Ground
O
O
O
O
O
Power
Ground
O
O
O
O
O
O
Power
Ground
I/O(PU)
O
I/O(PU)
O
I/O(PU)
Power
Ground
O
I/O(PU)
O
I/O(PU)
O
Hardware configuration
Chip select 6 for Flash and Hardware configuration
Hardware configuration
Hardware configuration
Hardware configuration
-
Digital power (3.3V)
Digital ground
-
SDRAM clock
-
Digital power (1.8V)
Digital ground
SDRAM write enable
SDRAM chip select 3
-
-
-
Digital power (3.3V)
Digital ground
SDRAM RAS
SDRAM CAS
Data mask 1
Data mask 0
-
Address bus [21]
Digital power (3.3V)
Digital ground
Data bus [15]
Address bus [7]
Data bus [14]
Address bus [6]
Data bus [13]
Digital power (1.8V)
Digital ground
Address bus[ 5]
Data bus [12]
Address bus [4]
Data bus [11]
Address bus [3]