22
YDP-162B/YDP-162C/YDP-162R/YDP-162PE
LSI PIN DESCRIPTION
（
LSI
端子機能表）
R8A02042BG
(YC479A00)
CPU
(SWX08) ....................................................................................24-25
μ
PD780031AYGK-N04
(X003120R)
E-LKS
.......................................................................................23
WM8524GEDT/R
(YC681A00)
DAC
(Digital to Analog Converter) ......................................................22
WM8524CGEDT/R
(YC681B00)
DAC
(Digital to Analog Converter) ...................................................22
YDA164C-QZE2
(YD652A00)
DIGITAL AMP
(Digital Audio Power Ampli
fi
er) .....................................22
PIN
NO.
I/O
FUNCTION
NAME
PIN
NO.
I/O
FUNCTION
NAME
1
2
3
4
5
6
7
8
LINEVOUTL
CPVOUTN
CPCB
LINEGND
CPCA
LINEVDD
DACDAT
LRCLK
O
O
O
-
O
-
I
I
Left line output
Charge Pump negative rail decoupling pin
Charge Pump fly back capacitor pin
Charge Pump ground
Charge Pump fly back capacitor pin
Charge Pump supply
Digital audio interface data input
Digital audio interface left/right clock
9
10
11
12
13
14
15
16
BCLK
MCLK
MUTE
AIFMODE
AGND
VMID
AVDD
LINEVOUTR
I
I
I
I
-
O
-
O
Digital audio interface bit clock
Master clock
0 = Mute enabled, 1 = Mute disabled
0 = 24-bit Left Justified, 1 = 24-bit I
2
S, Z = 24-bit Right Justified
Analogue ground
Analogue midrail decoupling pin
Analogue supply
Right line output
WM8524CGEDT/R
(YC681B00)
DAC
(Digital to Analog Converter)
WM8524GEDT/R
(YC681A00)
DAC
(Digital to Analog Converter)
DM: IC102
PIN
NO.
I/O
FUNCTION
NAME
PIN
NO.
I/O
FUNCTION
NAME
YDA164C-QZE2
(YD652A00)
DIGITAL AMP
(Digital Audio Power Amplifier)
DM: IC103
-
O
O
-
I
I
I
I
-
-
-
O
-
O
-
-
HOPP
PLIMIT
SLEEPN
PROTN
MUTEN
CKMOD
GAIN0
GAIN1
MONO
PVSSL
PVDDML
OUTML
PVSSL
OUTPL
PVDDPL
PVSSL
AVSS
VREF
REFA
DVDD
MCK
SDATA
SCLK
LRCLK
DVSS
PVSSR
PVDDPR
OUTPR
PVSSR
OUTMR
PVDDMR
PVSSR
Analog GND
Analog Reference Voltage Output
Internal Regulator Output
Digital Power
Master Clock Input Pin
Audio Data Input Pin
Bit Clock Input Pin
Word Clock Input Pin
Digital GND
GND for the digital amplifier output (Rch)
Power for the digital amplifier output (Rch+)
Digital Amplifier Output (Rch+)
GND for the digital amplifier output (Rch)
Digital Amplifier Output (Rch-)
Power for the digital amplifier output (Rch-)
GND for the digital amplifier output (Rch)
PWM Carrier Frequency Hopping setting pin
Power Limit setting pin
Sleep Reset pin
Error Flag Output pin
Mute pin
Clock Mode setting pin
Gain setting pin 0
Gain setting pin 1
Stereo/Mono setting pin
GND for the digital amplifier output (Lch)
Power for the digital amplifier output (Lch-)
Digital Amplifier Output (Lch-)
GND for the digital amplifier output (Lch)
Digital Amplifier Output (Lch+)
Power for the digital amplifier output (Lch+)
GND for the digital amplifier output (Lch)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
I
I
I
O
I
I
I
I
I
-
-
O
-
O
-
-
