XVME-2 12 Manual
August, 1989
- Module identification - The XVME-212 has ID information which provides its name,
model number, manufacturer, and revision level at a location that is consistent
with
other Xycom I/O modules.
-
Status/Control Register - This register is always located at address base + 8 lH, and
the lower four bits (two Test Status bits, and a red and green LED bit) are standard
from module to module.
A detailed description of Xycom I/O Architecture is presented in Appendix A at the rear
of this manual.
1.5
XVME-212 MODULE SPECIFICATIONS
Table l-l. XVME-2 12 Module Specifications
Characteristic
Number of Channels
Specification
3 2
Input Voltage Range (XVME-212/l)
+5OV DC max.
Logic 1 -- 10 to 5OV DC
Logic 0 -- 0 to lV DC
Typical t h r e s h o l d 3 V
- -
DC
Input Voltage Range (XVME-212/2)
+65V DC max.
Logic 1 -- 2 to 6.5V DC
Logic 0 -- 0 to 0.8V DC
Typical threshold -- 1.2V DC
Input Impedance (XVME-2 12/ 1)
3.9K +5%
Input Impedance (XVME-2 12/2)
330 +5%
Propagation Delay
(with fastest debounce selected)
Of f-to-on
100 usec max. (l0-25 usec typ.)
On-to-off
600 usec max. (150 usec typ.)
Minimum Detectable Pulse Width
Positive pulse
Negative pulse
100 usec max. (l0-25 usec typ.)
600 usec max. (150 usec typ.)
Maximum Input Frequency
3.4 KHz typical
Debounce Time
Jumper-selectable from 4.5 usec to 18 msec
(8 possible settings)
Reverse Bias Protection (XVME-212/l)
- 50 V max.
Reverse Bias Protection (XVME-2 12/2) - 6.5V max.
Power Requirements
+5V,
1.7 Amp typ., 2.0 Amp max.
1-3
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